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NCP623MN-4.0R2 Datasheet(PDF) 7 Page - ON Semiconductor |
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NCP623MN-4.0R2 Datasheet(HTML) 7 Page - ON Semiconductor |
7 / 14 page NCP623 http://onsemi.com 7 Figure 6. NCP623 Wake−up Improvement with Small PNP Transistor 1 ms 30 ms NCP623 Without Wake−up Improvement (Typical Response) NCP623 With Wake−up Improvement (Typical Response) The PNP being wired upon the bypass pin, it shall not degrade the noise response of the NCP623. Figure 7 confirms the good behavior of the integrated circuit in this area which reaches a typical noise level of 26 mVRMS (100 Hz to 100 kHz) at Iout = 60 mA. Frequency (Hz) 100 1,000 350 200 150 100 1,000,000 50 10,000 Figure 7. Noise Density of the NCP623 with a 10 nF Bypass Capacitor and a Wake−up Improvement Network 100,000 250 300 0 Cbyp = 10 nF Vin = 3.8 V Vout = 2.8 V Co = 1.0 mF Iout = 60 mA Tamb = 25°C Output Noise = 26 mVrms C = 10 nF @ 100 Hz − 100 kHz |
Similar Part No. - NCP623MN-4.0R2 |
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Similar Description - NCP623MN-4.0R2 |
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