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PCM1773RGAR Datasheet(PDF) 5 Page - Burr-Brown (TI) |
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PCM1773RGAR Datasheet(HTML) 5 Page - Burr-Brown (TI) |
5 / 29 page PCM1772 PCM1773 SLES010D – SEPTEMBER 2001 – REVISED MAY 2004 www.ti.com 5 Terminal Functions PCM1772PW TERMINAL I/O DESCRIPTIONS NAME NO. I/O DESCRIPTIONS AGND1 5 — Analog ground. This is a return for VCC1. AGND2 6 — Analog ground. This is a return for VCC2. AIN 10 I Monaural analog signal mixer input. The signal can be mixed with the output of L- and R-channel DACs. BCK 3 I/O Serial bit clock. Clocks the individual bits of the audio data input, DATA. In the slave interface mode, this clock is input from external device. In master interface mode, the PCM1772 device generates the BCK output to an external device. DATA 2 I Serial audio data input LRCK 1 I/O Left and right clock. Determines which channel is being input on the audio data input, DATA. The frequency of LRCK must be the same as the audio sampling rate. In the slave interface mode, this clock is input from an external device. In the master interface mode, the PCM1772 device generates the LRCK output to an external device. MC 14 I Mode control port serial bit clock input. Clocks the individual bits of the control data input, MD. MD 13 I Mode control port serial data input. Controls the operation mode on the PCM1772 device. MS 15 I Mode control port select. The control port is active when this terminal is low. PD 4 I Reset input. When low, the PCM1772 device is powered down, and all mode control registers are reset to default settings. SCKI 16 I System clock input VCC1 12 — Power supply for all analog circuits except the lineout amplifier. VCC2 11 — Analog power supply for the lineout amplifier circuits. The voltage level must be the same as VCC1. VCOM 7 — Decoupling capacitor connection. An external 10- µF capacitor connected from this terminal to analog ground is required for noise filtering. Voltage level of this terminal is 0.5 VCC2 nominal. VOUTL 9 O L-channel analog signal output of the lineout amplifiers VOUTR 8 O R-channel analog signal output of the lineout amplifiers PCM1772RGA TERMINAL I/O DESCRIPTIONS NAME NO. I/O DESCRIPTIONS AGND1 4 — Analog ground. This is a return for VCC1. AGND2 5 — Analog ground. This is a return for VCC2. AIN 10 I Monaural analog signal mixer input. The signal can be mixed with output of L- and R-channel DACs. BCK 2 I/O Serial bit clock. Clocks the individual bits of the audio data input, DATA. In the slave interface mode, this clock is input from an external device. In the master interface mode, the PCM1772 device generates the BCK output to an external device. DATA 1 I Serial audio data input LRCK 20 I/O Left and right clock. Determines which channel is being input on the audio data input, DATA. The frequency of LRCK must be the same as the audio sampling rate. In the slave interface mode, this clock is input from an external device. In the master interface mode, the PCM1772 device generates the LRCK output to an external device. MC 14 I Mode control port serial bit clock input. Clocks the individual bits of the control data input, MD. MD 13 I Mode control port serial data input. Controls the operation mode on the PCM1772 device. MS 15 I Mode control port select. The control port is active when this terminal is low. NC 8, 17, 18, 19 — No connect PD 3 I Reset input. When low, the PCM1772 device is powered down, and all mode control registers are reset to default settings. SCKI 16 I System clock input VCC1 12 — Power supply for all analog circuits except lineout amplifier. VCC2 11 — Analog power supply for lineout amplifier circuits. The voltage level must be the same as VCC1. VCOM 6 — Decoupling capacitor connection. An external 10- µF capacitor connected from this terminal to analog ground is required for noise filtering. Voltage level of this terminal is 0.5 VCC2 nominal. VOUTR 7 O R-channel analog signal output of lineout amplifiers. VOUTL 9 O L-channel analog signal output of lineout amplifiers. |
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