9

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Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

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FN7120.1

May 13, 2005

MSOP Package Information

NOTE: The package drawing shown here may not be the latest version. To check the latest revision, please refer to the Intersil

website at <http://www.intersil.com/design/packages/index.asp>

DETAIL X

Symbol

DIMENSION TABLE

Tolerance

A

A1

A2

D

E

E1

L

b

c

L1

1.10

0.10

0.86

3.00

4.90

3.00

0.55

0.23

0.18

MAX.

+/- 0.05

+/- 0.09

+/- 0.10

+/- 0.15

+/- 0.10

+/- 0.15

+0.07/-0.08

+/- 0.05

Basic

(1)

(2)

Notes:

(1) Plastic or metal protrusions of 0.15 mm

maximum per side are not included.

(2) Plastic interlead protrusi

ons of 0.25 mm

maximum per side are not included.

(3) Dimensions "D" and "E1" aremeasured

at Datum Plane "H".

(4) Dimensioning and tolerancing per

ASME Y14.5M-1994.

(3)

(3)

B

A

0.25

C A B

1

(N/2)

(N/2)+1

N

C

Plane

Seating

N Leads

0.10

C

0.08

C A B

H

3×±3×

Gauge

Plane

See Detail "X"

0.95

e0.50

Basic

Pin #1

I.D. Mark

E1

E

e

b

L1

c

A

0.25

A2

A1

L

HIGH PERFORMANCE ANA

LOG INTEGRATED CIRCUITS

Semiconductor, Inc.

Rev: C

Date: 6/14/99

Drawing #: MDP0043

PACKAGE OUTLINE DRAWING

MINI SO PACKAGE (MSOP) PACKAGE FAMILY

JEDEC Reg: MO-187

Units: mm

MSOP8

MSOP10

0.10

0.95

0.65

0.33

0.18

4.90

3.00

0.55

0.86

3.00

1.10

N8

10

Reference

EL7515