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MB85RS16NPNF-G-JNERE1 Datasheet(PDF) 11 Page - Fujitsu Component Limited. |
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MB85RS16NPNF-G-JNERE1 Datasheet(HTML) 11 Page - Fujitsu Component Limited. |
11 / 28 page MB85RS16N DS501-00030-3v0-E 11 ■ BLOCK PROTECT Writing protect block for WRITE command is configured by the value of BP0 and BP1 in the status register. ■ WRITING PROTECT Writing operation of the WRITE command and the WRSR command are protected with the value of WEL, WPEN, WP as shown in the table. ■ HOLD OPERATION Hold status is retained without aborting a command if HOLD is the “L” level while CS is the “L” level. The timing for starting and ending hold status depends on the SCK to be the “H” level or the “L” level when a HOLD pin input is transited to the hold condition as shown in the diagram below. In case the HOLD pin transited to “L” level when SCK is “L” level, return the HOLD pin to “H” level at SCK being “L” level. In the same manner, in case the HOLD pin transited to “L” level when SCK is “H” level, return the HOLD pin to “H” level at SCK being “H” level. Arbitrary command operation is interrupted in hold status, SCK and SI inputs become don’t care. And, SO becomes High-Z while reading command (RDSR, READ). If CS is rising during hold status, a command is aborted. In case the command is aborted before its recognition, WEL holds the value before transition to hold status. BP1 BP0 Protected Block 00 None 0 1 600H to 7FFH (upper 1/4) 1 0 400H to 7FFH (upper 1/2) 1 1 000H to 7FFH (all) WEL WPEN WP Protected Blocks Unprotected Blocks Status Register 0 X X Protected Protected Protected 1 0 X Protected Unprotected Unprotected 1 1 0 Protected Unprotected Protected 1 1 1 Protected Unprotected Unprotected SCK CS Hold Condition HOLD Hold Condition |
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