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IDT82V2058BB Datasheet(PDF) 9 Page - Integrated Device Technology |
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IDT82V2058BB Datasheet(HTML) 9 Page - Integrated Device Technology |
9 / 52 page 9 INDUSTRIAL TEMPERATURE RANGES IDT82V2058 OCTAL E1 SHORT HAUL LINE INTERFACE UNIT PIN DESCRIPTION (CONTINUED) Name Type Pin No. Description QFP144 BGA160 INT O 82 K13 INT: Interrupt (Active Low) Open This is the open drain, active low interrupt output. Four sources may cause the interrupt (refer Drain to Interrupt Handling of Functional Description for details). LP7/D7/AD7 I/O 28 K1 LPn: Loopback Select 7~0 LP6/D6/AD6 27 J1 In hardware control mode, pin LPn configures the corresponding channel in different loopback LP5/D5/AD5 Tri-State 26 J2 mode, as follows: LP4/D4/AD4 25 J3 LPn Loopback Configuration LP3/D3/AD3 24 J4 Low Remote Loopback LP2/D2/AD2 23 H2 VDDIO/2 No Loopback LP1/D1/AD1 22 H3 High Analog Loopback LP0/D0/AD0 21 G2 Refer to Loopback Configuration of Functional Description for details. Dn: Data Bus 7~0 In non-multiplexed host mode, these pins are the bi-directional data bus. ADn: Address/Data Bus 7~0 In multiplexed host mode, these pins are the multiplexed bi-directional address/data bus. In serial host mode, these pins should be grounded. A4 I 12 F4 MCn: Performance Monitor Configuration 4~0 MC3/A3 13 F3 In hardware control mode, A4 must be connected to GND. MC[3:0] are used to select one MC2/A2 14 F2 transmitter or receiver of the channel 1 to 7 for non-intrusive monitoring. Channel 0 is used as MC1/A1 15 F1 the monitoring channel. If a transmitter is monitored, signals on the corresponding pins TTIPn MC0/A0 16 G3 and TRINGn are internally transmitted to RTIP0 and RRING0. If a receiver is monitored, signals on the corresponding pins RTIPn and RRINGn are internally transmitted to RTIP0 and RRING0. The clock and data recovery circuit in receiver 0 can then output the monitored clock to pin RCLK0 as well as the monitored data to RDP0 and RDN0 pins. The signals monitored by cha- nnel 0 can be routed to TTIP0/TRING0 by activating the remote loopback in this channel. Performance Monitor Configuration determined by MC[3:0] is shown below. Note that if MC[2:0] = 000, the device is in normal operation of all the channels. MC[3:0] Monitoring Configuration 0000 Normal operation without monitoring 0001 Monitoring receiver 1 0010 Monitoring receiver 2 0011 Monitoring receiver 3 0100 Monitoring receiver 4 0101 Monitoring receiver 5 0110 Monitoring receiver 6 0111 Monitoring receiver 7 1000 Normal operation without monitoring 1001 Monitoring transmitter 1 1010 Monitoring transmitter 2 1011 Monitoring transmitter 3 1100 Monitoring transmitter 4 1101 Monitoring transmitter 5 1110 Monitoring transmitter 6 1111 Monitoring transmitter 7 An: Address Bus 4~0 When pin MODE1 is low, the parallel host interface operates with separate address and data bus. In this mode, the signal on this pin is the address bus of the host interface. |
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