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NRVB140SFT1G Datasheet(PDF) 4 Page - ON Semiconductor |
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NRVB140SFT1G Datasheet(HTML) 4 Page - ON Semiconductor |
4 / 5 page MBR140SF, NRVB140SF http://onsemi.com 4 Figure 7. Capacitance Figure 8. Typical Operating Temperature Derating* 30 0 VR, DC REVERSE VOLTAGE (VOLTS) 125 65 55 15 510 20 25 40 35 30 0 VR, REVERSE VOLTAGE (VOLTS) 1000 100 10 15 510 20 25 TJ = 25°C 40 35 75 85 95 105 115 RqJA = 25.6°C/W 130 °C/W 235 °C/W 324.9 °C/W * Reverse power dissipation and the possibility of thermal runaway must be considered when operating this device under any re- verse voltage conditions. Calculations of TJ therefore must include forward and reverse power effects. The allowable operating TJ may be calculated from the equation: TJ = TJmax − r(t)(Pf + Pr) where r(t) = thermal impedance under given conditions, Pf = forward power dissipation, and Pr = reverse power dissipation This graph displays the derated allowable TJ due to reverse bias under DC conditions only and is calculated as TJ = TJmax − r(t)Pr, where r(t) = Rthja. For other power applications further calculations must be performed. Figure 9. Thermal Response 1000 0.1 0.00001 t1, TIME (sec) 1000 1 0.0001 0.001 0.01 1 10 100 0.000001 0.1 10 100 P(pk) t1 t2 DUTY CYCLE, D = t1/t2 qJA = 321.8 °C/W Test Type > Min Pad < Die Size 38x38 @ 75% mils D = 0.5 SINGLE PULSE 0.2 0.1 0.05 0.01 |
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