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LM95010CIMM Datasheet(PDF) 7 Page - National Semiconductor (TI) |
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LM95010CIMM Datasheet(HTML) 7 Page - National Semiconductor (TI) |
7 / 19 page Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. Note 2: All voltages are measured with respect to GND, unless otherwise noted. Note 3: When the input voltage (VIN) at any pin exceeds the power supplies (VIN < GND or VIN > V+), the current at that pin should be limited to 5 mA. Parasitic components and/or ESD protection circuitry are shown below for the LM95010’s pins. The nominal breakdown voltage of D3 is 6.5 V. SNP stands for snap-back device. Devices that are connected to a particular pin are marked with a"U" in the table below. Pin Name PIN # D1 D2 D3 D4 D5 R1 SNP ESD CLAMP V+/3.3V SB 1 UU NC 2 UUUUUU U NC 3 NC 4 UU UU U ADD0 6 UU UU U ADD1 7 UU U SWD 8 UU UU U Note 4: Human body model, 100 pF discharged through a 1.5 k Ω resistor. Machine model, 200 pF discharged directly into each pin. See Figure 4 above for the ESD Protection Input Structure. Note 5: Thermal resistance junction-to-ambient when attached to a printed circuit board with 2 oz. foil is 210 ˚C/W. Note 6: See the URL “http://www.national.com/packaging/” for other recommendations and methods of soldering surface mount devices. Note 7: “Typicals” are at TA = 25 ˚C and represent most likely parametric norm. They are to be used as general reference values not for critical design calculations. Note 8: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level). Note 9: The supply current will not increase substantially with SensorPath transactions. Note 10: Temperature accuracy does not include the effects of self-heating. The rise in temperature due to self-heating is the product of the internal power dissipation of the LM95010 and the thermal resistance. See (Note 5) for the thermal resistance to be used in the self-heating calculation. Note 11: This specification is provided only to indicate how often temperature data is updated once enabled. Note 12: The output fall time is measured from VIH min to VIL max. The output fall time is guaranteed by design. Note 13: The output rise time is measured from VIL max to VIH min. The output rise time is guaranteed by design. 20082006 FIGURE 4. ESD Protection Input Structure. Devices that are connected to a particular pin are marked with a"U"in the table above. www.national.com 7 |
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