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X9430WS24I-2.7 Datasheet(PDF) 7 Page - Xicor Inc. |
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X9430WS24I-2.7 Datasheet(HTML) 7 Page - Xicor Inc. |
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7 / 21 page  X9430 – Preliminary Information Characteristics subject to change without notice. 7 of 21 REV 1.0 6/20/00 www.xicor.com Figure 7. Increment/Decrement Timing SCK SI VW INC/DEC CMD Issued tWRID VOUT REGISTER OPERATION Both digitally controlled potentiometers share the serial interface and share a common architecture. Each potentiometer is associated with a wiper counter regis- ter (WCR), and four data registers. Figure 8 illustrates the control, registers, and system features of the device. Figure 8. System Block Diagram Wiper Counter (WCR) and Analog Control Registers (ACR) The X9430 contains two wiper counter registers, one for each XDCP. The wiper counter register is equivalent to a serial-in, parallel-out counter with its outputs decoded to select one of sixty-four switches along its resistor array. The contents of the wiper counter register can be altered in four ways: it may be written directly by the host via the write WCR instruction (serial load); it may be written indirectly by transferring the contents of one of four associated data registers (DR) via the XFR data register instruction (parallel load); it can be modi- fied one step at a time by the increment/decrement instruction (WCR only). Finally, it may be loaded with the contents of its associated data register zero (R0) upon power-up. The wiper counter register is a volatile register; that is, its contents are lost when the X9430 is powered-down. Although the registers are automatically loaded with the value in R0 upon power-up, it should be noted this may be different from the value present at power-down. Data Registers (DR) Each potentiometer has four nonvolatile data registers (DR). These can be read or written directly by the host and data can be transferred between any of the four data registers and the WCR. It should be noted all operations changing data in one of these registers is a nonvolatile operation and will take a maximum of 10ms. If the application does not require storage of multiple set- tings for the potentiometer, these registers can be used as regular memory locations that could store system parameters or user preference data. VOUT (0,1) (DR0-DR3)0,1 Control and CS SCK SO SI A1 A0 VH (0,1) VL (0,1) WP VW (0,1) VN (0,1) + – WCR0,1 VINV (0,1) VSS VCC HOLD Memory WCR0 WCR1 Detailed Block Diagram |
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