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LMC7660IN Datasheet(PDF) 6 Page - National Semiconductor (TI) |
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LMC7660IN Datasheet(HTML) 6 Page - National Semiconductor (TI) |
6 / 12 page Typical Applications (Continued) Increasing Output Voltage Stacking the LMC7660s is an easy way to produce a greater negative voltage. It should be noted that the input current re- quired for each stage is twice the load current on that stage as shown in Figure 6. The effective output resistance is ap- proximately the sum of the individual R out values, and so only a few levels of multiplication can be used. It is possible to generate −15V from +5V by connecting the second 7660’s pin 8 to +5V instead of ground as shown in Figure 7. Note that the second 7660 sees a full 20V and the input supply should not be increased beyond +5V. Split V + In Half Figure 8 is one of the more interesting applications for the LMC7660. The circuit can be used as a precision voltage di- vider (for very light loads), alternately it is used to generate a 1 ⁄2 supply point in battery applications. In the 1⁄2 cycle when S1 and S3 are closed, the supply voltage divides across the capacitors in a conventional way proportional to their value. In the 1⁄2 cycle when S2 and S4 are closed, the capacitors switch from a series connection to a parallel connection. This forces the capacitors to have the same voltage; the charge redistributes to maintain precisely V +/2, across C p and Cr.In this application all devices are only V +/2, and the supply volt- age can be raised to 20V giving exactly 10V at V out. DS009136-9 FIGURE 5. Lowering Output Resistance by Paralleling Devices DS009136-10 FIGURE 6. Higher Voltage by Cascade DS009136-11 FIGURE 7. Getting −15V from +5V www.national.com 6 |
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