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LM25141-Q1

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SNVSAP9 – MARCH 2017

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Copyright © 2017, Texas Instruments Incorporated

(1)

AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.2 ESD Ratings

VALUE

UNIT

Electrostatic discharge

±2000

V

Charged-device model (CDM), per AEC

Q100-011

All pins except

1,6,7,12,13,18,19, and 24

±500

Pins 1,6,7,12,13,18,19, and

24

±750

(1)

Recommended Operating Conditions are conditions under which the device is intended to be functional. For specifications and test

conditions, see Electrical Characteristics.

(2)

High junction temperatures degrade operating lifetimes. Operating lifetime is de-rated for junction temperatures greater than 125°C.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

NOM

MAX

UNIT

Input voltage

VIN

3.8

42

V

SW to PGND

–0.3

42

V

HB to SW

–0.3

5

5.25

V

HO, HOL to SW

–0.3

HB + 0.3

V

LO, LOL to PGND

–0.3

5

5.25

V

FB, PG, OSC, SS, RES, DEMB,

VCCX

–0.3

5

V

EN to PGND

–0.3

42

V

VCC, VDD

–0.3

5

5.25

V

VOUT, CS

1.5

5

15

V

PGND to AGND

–0.3

0.3

V

–40

150

°C

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

6.4 Thermal Information

LM25141-Q1

UNIT

RGE (VQFN)

24 PINS

Junction-to-ambient thermal resistance

34.1

°C/W

Junction-to-case (top) thermal resistance

36.8

°C/W

Junction-to-board thermal resistance

12.1

°C/W

Junction-to-top characterization parameter

0.5

°C/W

Junction-to-board characterization parameter

12.2

°C/W

Junction-to-case (bottom) thermal resistance

2.9

°C/W