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ADCMP551 Datasheet(PDF) 1 Page - Analog Devices |
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ADCMP551 Datasheet(HTML) 1 Page - Analog Devices |
1 / 14 page Single Supply High Speed PECL Comparators Preliminary Technical Data ADCMP551/ADCMP552/ADCMP553 Rev. PrB Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved. FEATURES Single power supply 750 ps propagation delay input to output 100 ps propagation delay dispersion Differential PECL compatible outputs Differential latch control Internal latch pull-up resistors Power supply rejection greater than 70 dB 750 ps minimum pulse width Equivalent input rise time bandwidth > 750 MHz Typical output rise/fall of 500 ps Programmable Hysteresis APPLICATIONS Automatic test equipment High speed instrumentation Scope and logic analyzer front ends Window comparators High speed line receivers Threshold detection Peak detection High speed triggers Patient diagnostics Disk drive read channel detection Hand-held test instruments Zero crossing detectors Line receivers and signal restoration Clock drivers FUNCTIONAL BLOCK DIAGRAM NONINVERTING INPUT INVERTING INPUT LATCH ENABLE INPUT Q OUTPUT LATCH ENABLE INPUT Q OUTPUT ADCMP551/ ADCMP552/ ADCMP553 Figure 1. GENERAL DESCRIPTION The ADCMP551/ADCMP552/ADCMP553 are single supply, high speed comparators fabricated on Analog Devices’ proprietary XFCB process. The devices feature a 750 ps propagation delay with less than 150 ps overdrive dispersion. Dispersion, a measure of the difference in propagation delay under differing overdrive conditions, is a particularly important characteristic of high speed comparators. A separate programmable hysteresis pin is available on the ADCMP552. A differential input stage permits consistent propagation delay with a common-mode range from –0.2 V to VCCI – 2.0 V. Outputs are complementary digital signals are fully compatible with PECL 10 K and 10 KH logic families. The outputs provide sufficient drive current to directly drive transmission lines terminated in 50 Ω to VCCO − 2 V. A latch input is included and permits tracking, track-and-hold, or sample-and-hold modes of operation. The latch input pins contain internal pull- ups that set the latch in tracking mode when left open. The ADCMP551/ADCMP552/ADCMP553 are specified over the –40°C to +85°C industrial temperature range. The ADCMP551 is available in a 16-lead QSOP package; the ADCMP552 is available in a 20-lead QSOP package; and the ADCMP553 is available in an 8-lead MSOP package. |
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