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LMV7239M5 Datasheet(PDF) 8 Page - National Semiconductor (TI) |
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LMV7239M5 Datasheet(HTML) 8 Page - National Semiconductor (TI) |
8 / 12 page Typical Performance Characteristics (Unless otherwise specified, V S = 5V, CL = 10pF, TA = 25˚C). (Continued) Propagation Delay vs. Common Mode Voltage Propagation Delay vs. Common Mode Voltage 10135916 10135917 Application Section The LMV7235/LMV7239 are single supply comparators with 45ns of propagation delay and only 65µA of supply current. The LMV7235/LMV7239 are rail-to-rail input and output. The typical input common mode voltage range of −0.2V below the ground to 0.2V above the supply. The LMV7235/39 use a complimentary PNP and NPN input stage in which the PNP stage senses common mode voltage near V− and the NPN stage senses common mode voltage near V +. If either of the input signals falls below the negative common mode limit, the parasitic PN junction formed by the substrate and the base of the PNP will turn on resulting in an increase of input bias current. If one of the input goes above the positive common mode limit, the output will still maintain the correct logic level as long as the other input stays within the common mode range. However, the propagation delay will increase. When both inputs are outside the common mode voltage range, current saturation occurs in the input stage, and the output becomes unpredictable. The propagation delay does not increase significantly with large differential input voltages. However, large differential voltages greater than the supply voltage should be avoided to prevent damage to the input stage. The LMV7239 has a push-pull output. When the output switches, there is a direct path between V CC and ground, causing high output sinking or sourcing current during the transition. After the transition, the output current decreases and the supply current settles back to about 65µA at 5V, thus conserving power consumption. The LMV7235 has an open drain that requires a pull-up resistor to a positive supply voltage for the output to switch properly. When the internal output transistor is off, the output voltage will be pulled up to the external positive voltage. Comparator with Hysteresis The basic comparator configuration may oscillate or produce a noisy output if the applied differential input voltage is near the comparator’s offset voltage. This usually happens when the input signal is moving very slowly across the compara- tor’s switching threshold. This problem can be prevented by the addition of hysteresis or positive feedback. Inverting Comparator with Hysteresis The inverting comparator with hysteresis requires a three resistor network that is referenced to the supply voltage V CC of the comparator. When V IN at the inverting input is less than V A, the voltage at the non-inverting node of the com- parator (V IN < VA), the output voltage is high (for simplicity assume V O switches as high as VCC). The three network resistors can be represented as R1//R3 in series with R2. The lower input trip voltage V A1 is defined as V A1 =VCCR2 / ((R1//R3) + R2) When V IN is greater than VA (VIN > VA), the output voltage is low, very close to ground. In this case the three network resistors can be presented as R2//R3 in series with R1. The upper trip voltage V A2 is defined as V A2 =VCC (R2//R3) / ((R1+ (R2//R3) The total hysteresis provided by the network is defined as Delta V A =VA1-VA2 To assure that the comparator will always switch fully to V CC and not be pulled down by the load the resistors, values should be chosen as follow: R PULL-UP << RLOAD www.national.com 8 |
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