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ACPL-W484 Datasheet(PDF) 8 Page - AVAGO TECHNOLOGIES LIMITED |
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ACPL-W484 Datasheet(HTML) 8 Page - AVAGO TECHNOLOGIES LIMITED |
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8 / 12 page  8 Table 6. Switching Specifications Over recommended operating conditions TA = -40° C to 105° C, VCC = +4.5 V to 30 V, IF(ON) = 4 mA to 7 mA, VF(OFF) = 0 V to 0.8 V, unless otherwise specified. All typicals at TA = 25° C. Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note Propagation Delay Time to Logic Low Output Level tPHL 95 150 ns CL = 100 pF, IF(ON) = 4 mA →VF = 0 V 5, 6, 8 6 150 Loaded as per Fig. 5 Propagation Delay Time to Logic High Output Level tPLH 85 120 ns CL = 100 pF, VF = 0 V → IF(ON) = 4 mA 5, 6, 8 6 120 Loaded as per Fig. 5 Pulse Width Distortion |tPHL - tPLH| = PWD 90 ns CL = 100 pF 9 90 Loaded as per Fig. 5 Propagation Delay Difference Between Any 2 Parts PDD -130 130 ns CL = 100 pF 10 -130 130 Loaded as per Fig. 5 Output Rise Time (10-90%) tr 6 ns 5 Output Fall Time (90-10%) tf 6 ns 5 Logic High Common Mode Transient Immunity |CMH| 30 kV/ µs |VCM| = 1000 V, IF = 4.0 mA, VCC = 5 V, TA = 25° C 9 7 Logic Low Common Mode Transient Immunity |CML| 30 kV/ µs |VCM| = 1000 V, VF = 0 V, VCC = 5 V, TA = 25° C 9 7 Table 7. Package Characteristics Parameter Symbol Min. Typ. Max. Units Test Conditions Fig. Note Input-Output Momentary Withstand Voltage* VISO 3750 (ACPL-M484/P484) 5000 (ACPL-W484) Vrms RH < 50%, t = 1 min. TA = 25° C 5, 8 Input-Output Resistance RI-O 1012 Ohm VI-O = 500 Vdc 5 Input-Output Capacitance CI-O 0.6 pF f = 1 MHz, VI-O = 0 Vdc 5 * The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating, refer to the IEC/EN/DIN EN 60747-5-5 Insulation Characteristics Table (if applicable). UVLO Figure 10a & b show typical output waveforms during Power-up and Power-down processes. Notes: 1. Derate total package power dissipation, PT, linearly above 70° C free-air temperature at a rate of 4.5mW/°C(ACPL-P484/W484) and linearly above 85° C free-air temperature at a rate of 0.75mW/°C(ACPL-M484). 2. Detector requires a Vcc of 4.5 V or higher for stable operation as output might be unstable if Vcc is lower than 4.5 V. Be sure to check the power ON/OFF operation other than the supply current. 3. Duration of output short circuit time should not exceed 500 µs. 4. Input capacitance is measured between pin 1 and pin 3. 5. Device considered a two-terminal device: pins 1, 2 and 3 shorted together and pins 4, 5 and 6 shorted together. 6. The tPLH propagation delay is measured from the 50% point on the leading edge of the input pulse to the 1.3 V point on the leading edge of the output pulse. The tPHL propagation delay is measured from the 50% point on the trailing edge of the input pulse to the 1.3 V point on the trailing edge of the output pulse. 7. CMH is the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic high state, VO > 2.0 V. CML is the maximum slew rate of the common mode voltage that can be sustained with the output voltage in the logic low state, VO < 0.8 V. Note: Equal value split resistors (Rin/2) must be used at both ends of the LED. 8. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 VRMS for one second (leakage detection current limit, II-O < = 5 µA). This test is performed before the 100% production test for partial discharge (Method b) shown in the IEC/EN/DIN EN 60747-5-5 Insulation Characteristics Table, if applicable. 9. Pulse Width Distortion (PWD) is defined as |tPHL - tPLH | for any given device. 10. The difference of tPLH and tPHL between any two devices under the same test condition. 11. Use of a 0.1 µF bypass capacitor connected between pins Vcc and Ground is recommended. |
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