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MGA-24106-TR2G Datasheet(PDF) 5 Page - AVAGO TECHNOLOGIES LIMITED |
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MGA-24106-TR2G Datasheet(HTML) 5 Page - AVAGO TECHNOLOGIES LIMITED |
5 / 19 page 5 Figure 2. Demo board and application schematic diagram for 1.575 GHz Notes: 1. R1, L4, C3, and C4 are not required in actual application. These are added on demoboard to mitigate power supply noise in the test environment. 2. Pin 3 must be left unconnected. 3. L1and L2 form the input matching network. C1, C2 and L3 form a matching network at the output of the LNA. 4. Bias control is achieved by either varying the SD voltage with/ without R2, or fixing the SD voltage to Vdd and adjusting R2 for desired current. R2 = 27 kOhm will result in 3.3mA. Bias control circuit R2=27 kohm GND C4[1]=330 pF Vsd Vdd RF in RF out 1 2 3 4 5 6 L1=10 nH L2=18 nH R1[1]=10 ohm L4[1]=22 nH C2=39 pF C3[1]=0.1 uF C1=1.0 pF L3=2.2 nH |
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