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DA14580-01PxAT1 Datasheet(PDF) 6 Page - Dialog Semiconductor |
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DA14580-01PxAT1 Datasheet(HTML) 6 Page - Dialog Semiconductor |
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6 / 155 page  Datasheet Revision 3.4 09-Nov-2016 CFR0011-120-01 6 of 155 © 2014 Dialog Semiconductor DA14580 Bluetooth Low Energy 4.2 SoC FINAL P3_0 P3_1 P3_2 P3_3 P3_4 P3_5 P3_6 P3_7 DIO DIO DIO DIO DIO DIO DIO DIO 4.8 I-PD I-PD I-PD I-PD I-PD I-PD I-PD I-PD INPUT/OUTPUT with selectable pull up/down resistor. Pull-down enabled during and after reset. General purpose I/O port bit or alternate function nodes. Contain state retention mechanism dur- ing power down. NOTE: This port is only available on the QFN48 package. Debug Interface SWDIO/P1_5 DIO 4.8 I-PU INPUT/OUTPUT. JTAG Data input/output. Bidirectional data and control communication. Can also be used as a GPIO SW_CLK/ P1_4 DIO 4.8 I-PD INPUT JTAG clock signal. Can also be used as a GPIO Clocks XTAL16Mp AI INPUT. Crystal input for the 16 MHz XTAL XTAL16Mm AO OUTPUT. Crystal output for the 16 MHz XTAL XTAL32kp AI INPUT. Crystal input for the 32.768 kHz XTAL XTAL32km AO OUTPUT. Crystal output for the 32.768 kHz XTAL Quadrature Decoder QD_CHA_X DI INPUT. Channel A for the X axis. Mapped on Px ports QD_CHB_X DI INPUT. Channel B for the X axis. Mapped on Px ports QD_CHA_Y DI INPUT. Channel A for the Y axis. Mapped on Px ports QD_CHB_Y DI INPUT. Channel B for the Y axis. Mapped on Px ports QD_CHA_Z DI INPUT. Channel A for the Z axis. Mapped on Px ports QD_CHB_Z DI INPUT. Channel B for the Z axis. Mapped on Px ports SPI Bus Interface SPI_CLK DO INPUT/OUTPUT. SPI Clock. Mapped on Px ports SPI_DI DI INPUT. SPI Data input. Mapped on Px ports SPI_DO DO OUTPUT. SPI Data output. Mapped on Px ports SPI_EN DI INPUT. SPI Clock enable (active LOW). Mapped on Px ports I2C Bus Interface SDA DIO/DIOD INPUT/OUTPUT. I2C bus Data with open drain port. Mapped on Px ports SCL DIO/DIOD INPUT/OUTPUT. I2C bus Clock with open drain port. In open drain mode, SCL is monitored to support bit stretching by a slave. Mapped on Px ports. UART Interface UTX DO OUTPUT. UART transmit data. Mapped on Px ports URX DI INPUT. UART receive data. Mapped on Px ports URTS DO OUTPUT. UART Request to Send. Mapped on Px ports UCTS DI INPUT. UART Clear to Send. Mapped on Px ports UTX2 DO OUTPUT. UART 2 transmit data. Mapped on Px ports URX2 DI INPUT. UART 2 receive data. Mapped on Px ports URTS2 DO OUTPUT. UART 2 Request to Send. Mapped on Px ports UCTS2 DI INPUT. UART 2 Clear to Send. Mapped on Px ports Table 1: Pin Description Pin Name Type Drive (mA) Reset State Description |
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