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FT232BL-XXYY Datasheet(PDF) 8 Page - Future Technology Devices International Ltd. |
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FT232BL-XXYY Datasheet(HTML) 8 Page - Future Technology Devices International Ltd. |
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8 / 34 page  Copyright © 2011 Future Technology Devices International Limited 8 Document No.: FT_000329 FT232BL /BQ USB UART IC Datasheet Version 2.2 Clearance No.: FTDI# 171 3.3 LQFP and QFN Package Pin Out Description Pin No. Name Type Description 7 USBDP I/O USB Data Signal Plus ( Requires 1.5k pull-up to 3V3OUT or RSTOUT# ) 8 USBDM I/O USB Data Signal Minus Table 3.1 USB Interface Group Pin No. Name Type Description 13 VCCIO PWR +3.0 volt to +5.25 volt VCC to the UART interface pins 10...12, 14...16 and 18...25. When interfacing with 3.3V external logic in a bus powered design connect VCCIO to a 3.3V supply generated from the USB bus. When interfacing with 3.3V external logic in a self powered design connect VCCIO to the 3.3V supply of the external logic. Otherwise connect to VCC to drive out at 5V CMOS level. 9,17 GND PWR Device ground supply pins 6 3V3OUT Output 3.3 volt Output from the integrated LDO regulator This pin should be decoupled to GND using a 33nF ceramic capacitor in close proximity to the device pin. Its prime purpose is to provide the internal 3.3V supply to the USB transceiver cell and the RSTOUT# pin. A small amount of current (<= 5mA) can be drawn from this pin to power external 3.3v logic if required. 3,26 VCC PWR +4.35 volt to +5.25 volt VCC to the device core, LDO and non-UART interface pins 30 AVCC PWR Device analogue power supply for internal x8 clock multiplier 29 AGND PWR Device analogue ground supply for internal x8 clock multiplier Table 3.2 Power and Ground Group Pin No. Name Type Description 4 RESET# Input Active low reset pin. This can be used by an external device to reset the FT232B. If not required can be left unconnected, or pulled up to VCC. 5 RSTOUT# Output Output of the internal Reset Generator. Stays high impedance for ~ 5ms after VCC > 3.5V and the internal clock starts up, and then clamps its output to the 3.3v output of the internal regulator. Taking RESET# low will also force RSTOUT# to drive low. RSTOUT# is NOT affected by a USB Bus Reset 12 TXLED# O.C LED Drive – Pulses Low when Transmitting Data via USB 11 RXLED# O.C LED Drive – Pulses Low when Receiving Data via USB 27 XTIN Input Input to 6MHz Crystal Oscillator Cell. This pin can also be driven by an external 6MHz clock if required. Note: Switching threshold of this pin is VCC/2, so if driving from an external source, the source must be driving at 5V CMOS level or AC- coupled to centre around VCC/2. 28 XTOUT Output Output from 6MHz Crystal Oscillator Cell. XTOUT stops oscillating during USB suspend, so take care if using this signal to clock external logic. 31 TEST Input Puts the device into IC test mode. Must be tied to GND for normal operation, otherwise the device will appear to fail. Table 3.3 Miscellaneous Signal Group |
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