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LPV321M5X Datasheet(PDF) 10 Page - National Semiconductor (TI) |
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LPV321M5X Datasheet(HTML) 10 Page - National Semiconductor (TI) |
10 / 21 page Application Notes (Continued) Low Supply Voltage. National provides guaranteed perfor- mance at 2.7V and 5V. These guarantees ensure operation throughout the battery lifetime. Rail-to-Rail Output. Rail-to-rail output swing provides maxi- mum possible dynamic range at the output. This is particu- larly important when operating on low supply voltages. Input Includes Ground. Allows direct sensing near GND in single supply operation. The differential input voltage may be larger than V + without damaging the device. Protection should be provided to pre- vent the input voltages from going negative more than −0.3V (at 25˚C). An input clamp diode with a resistor to the IC input terminal can be used. 2.0 Capacitive Load Tolerance The LPV321/358/324 can directly drive 200 pF in unity-gain without oscillation. The unity-gain follower is the most sensi- tive configuration to capacitive loading. Direct capacitive loading reduces the phase margin of amplifiers. The combi- nation of the amplifier’s output impedance and the capacitive load induces phase lag. This results in either an under- damped pulse response or oscillation. To drive a heavier ca- pacitive load, circuit in Figure 1 can be used. In Figure 1, the isolation resistor R ISO and the load capacitor C L form a pole to increase stability by adding more phase margin to the overall system. The desired performance de- pends on the value of R ISO. The bigger the RISO resistor value, the more stable V OUT will be. Figure 2 is an output waveform of Figure 1 using 100k Ω for R ISO and 1000pF for C L. The circuit in Figure 3 is an improvement to the one in Figure 1 because it provides DC accuracy as well as AC stability. If there were a load resistor in Figure 1, the output would be voltage divided by R ISO and the load resistor. Instead, in Fig- ure 3,R F provides the DC accuracy by using feed-forward techniques to connect V IN to RL. Caution is needed in choos- ing the value of R F due to the input bias current of the LPV321/358/324. C F and RISO serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier’s inverting input, thereby preserving phase margin in the overall feedback loop. Increased capacitive drive is possible by increasing the value of C F . This in turn will slow down the pulse response. 3.0 Input Bias Current Cancellation The LPV321/358/324 family has a bipolar input stage. The typical input bias current of LPV321/358/324 is 1.5nA with 5V supply. Thus a 100k Ω input resistor will cause 0.15mV of error voltage. By balancing the resistor values at both invert- ing and non-inverting inputs, the error caused by the ampli- fier’s input bias current will be reduced. The circuit in Figure 4 shows how to cancel the error caused by input bias current. 4.0 Typical Single-Supply Application Circuits 4.1 Difference Amplifier The difference amplifier allows the subtraction of two volt- ages or, as a special case, the cancellation of a signal com- mon to two inputs. It is useful as a computational amplifier, in making a differential to single-ended conversion or in reject- ing a common mode signal. DS100920-4 FIGURE 1. Indirectly Driving A Capacitive Load Using Resistive Isolation DS100920-75 FIGURE 2. Pulse Response of the LPV324 Circuit in Figure 1 DS100920-5 FIGURE 3. Indirectly Driving A Capacitive Load with DC Accuracy DS100920-6 FIGURE 4. Cancelling the Error Caused by Input Bias Current www.national.com 10 |
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