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CH7008A-V Datasheet(PDF) 5 Page - List of Unclassifed Manufacturers |
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CH7008A-V Datasheet(HTML) 5 Page - List of Unclassifed Manufacturers |
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5 / 49 page  201-0000-027 Rev 2.2, 9/30/99 5 CHRONTEL CH7008A 44-Pin PLCC 44-Pin TQFP Type Symbol Description 32 26 In/Out SD Serial Data Input/Output This pin functions as the serial data pin of the I2C interface port, and uses the DVDD supply. (see the I2C Port Operation section for details) 33 27 In SC Serial Clock Input This pin functions as the serial clock pin of the I2C interface port, and uses the DVDD supply. (see the I2C Port Operation section for details) 35 29 In RESET* Reset* Input When this pin is low, the CH7008 is held in the power-on reset condition. When this pin is high, the device operates normally and reset is controlled through the I2C register. 38 32 In XI/FIN Crystal Input/External Reference Input A parallel resonance 14.31818MHz crystal should be attached between this pin and XO. However, an external CMOS clock can be attached to XI/FIN. 39 33 Out XO Crystal Output A parallel resonance 14.31818MHz +20ppm crystal should be attached between this pin and XI/FIN. However, if an external CMOS clock is attached to XI/FIN, XO should not be connected. 41 35 In/Out DS/BCO Data start (input)/Buffered Clock (output) In normal operating modes, when configured as an input, the rising edge of this signal identifies the first active pixel of data for each active line. The level is 0 to DVDD2, with VREF as the threshold level. When configured as an output this pin provides a buffered clock output, driven by the DVDD supply. The output clock can be selected using the BCO register (17th) (see Registers and Programing). 43 37 Out P-OUT Pixel Clock Output This pin provides a pixel clock signal to the VGA controller (adjustable as 1X, 2X and 3X) and is driven from the DVDD2 supply. This clock will only be provided in master clock modes, and will be tri-stated otherwise, (see the section on Digital Video Interface and Registers and Programming for more details). The capacitive loading on this pin should be kept to a minimum. 11,22,36 5,16,30 Power DVDD Digital Supply Voltage 14,24,34, 42 8,18,28,3 6 Power DGND Digital Ground 25,29 19,23 Power GND DAC 31 25 Power VDD DAC Supply Voltage 37 31 Power AVDD PLL Supply Voltage 40 34 Power AGND PLL Ground 44 38 Power DVDD2 I/O SUPPLY VOLTAGE Digital supply voltage for the P-OUT Table 1. Pin Descriptions |
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