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COP425C Datasheet(PDF) 11 Page - National Semiconductor (TI) |
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COP425C Datasheet(HTML) 11 Page - National Semiconductor (TI) |
11 / 24 page Functional Description (Continued) The HALT mode is the minimum power dissipation state Note If the user has selected dual-clock with D0 as external oscillator (option 30e2) AND the COP444C424C is running with the D0 clock the HALT mode either hardware or software will NOT be entered Thus the user should switch to the CKI clock to HALT Al- ternatively the user may stop the D0 clock to mini- mize power CKO PIN OPTIONS a Two-pin oscillator (Crystal) See Figure 9A In a crystal controlled oscillator system CKO is used as an output to the crystal network The HALT mode may be entered by program control (HALT instruction) which forces CKO high thus inhibiting the crystal network The circuit can be awakened only by forcing the RESET pin to a logic ‘‘0’’ (restart) b One-pin oscillator (RC or external) See Figure 9B If a one-pin oscillator system is chosen two options are available for CKO CKO can be selected as the HALT IO port In that case it is an IO flip-flop which is an indicator of the HALT status An external signal can over-ride this pin to start and stop the chip By forcing a high level to CKO the chip will stop as soon as CKI is high and CKO output will stay high to keep the chip stopped if the external driver returns to high impedance state By forcing a low level to CKO the chip will continue and CKO will stay low As another option CKO can be a general purpose in- put read into bit 2 of A (accumulator) upon execution of an INIL instruction OSCILLATOR OPTIONS There are four basic clock oscillator configurations available as shown by Figure 8 a Crystal Controlled Oscillator CKI and CKO are connect- ed to an external crystal The instruction cycle time equals the crystal frequency optionally divided by 4 8 or 16 b External Oscillator The external frequency is optionally divided by 4 8 or 16 to give the instruction cycle time CKO is the HALT IO port or a general purpose input c RC Controlled Oscillator CKI is configured as a single pin RC controlled Schmitt trigger oscillator The instruction cycle equals the oscillation frequency divided by 4 CKO is the HALT IO port or a general purpose input d Dual oscillator By selecting the dual clock option pin D0 is now a single pin oscillator input Two configurations are available RC controlled Schmitt trigger oscillator or exter- nal oscillator The user may software select between the D0 oscillator (in that case the instruction cycle time equals the D0 oscillation frequency divided by 4) by setting the D0 latch high or the CKI (CKO) oscillator by resetting D0 latch low Note that even in dual clock mode the counter if mask- programmed as a time-base counter is always connect- ed to the CKI oscillator For example the user may connect up to a 1 MHz RC circuit to D0 for faster processing and a 32 kHz watch crystal to CKI and CKO for minimum current drain and time keeping Note CTMA instruction is not allowed when chip is running from D0 clock Figures 10A and 10B show the clock and timer diagrams with and without Dual clock COP445C AND COP425C 24-PIN PACKAGE OPTION If the COP444C424C is bonded in a 24-pin package it be- comes the COP445C425C illustrated in Figure 2 Connec- tion diagrams Note that the COP445C425C does not con- tain the four general purpose IN inputs (IN3 – IN0) Use of this option precludes of course use of the IN options in- terrupt feature external event counter feature and the Microbus option which uses IN1 – IN3 All other options are available for the COP445C425C Note If user selects the 24-pin package options 9 10 19 and 20 must be selected as a ‘‘0’’ (load to VCC on the IN inputs) See option list COP426C 20-PIN PACKAGE OPTION If the COP425C is bonded as 20-pin device it becomes the COP426C Note that the COP426C contains all the COP425C pins except D0 D1 G0 and G1 Block Diagram (Continued) TLDD5259 – 10 FIGURE 9A Halt Mode Two-Pin Oscillator 11 |
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