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MM74C240J Datasheet(PDF) 3 Page - National Semiconductor (TI) |
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MM74C240J Datasheet(HTML) 3 Page - National Semiconductor (TI) |
3 / 6 page AC Electrical Characteristics TA e 25 C CL e 50 pF unless otherwise specified Symbol Parameter Conditions Min Typ Max Units tPD(1) tPD(0) Propagation Delay (Data In to Out) MM54C240MM74C240 VCC e 5V CL e 50 pF 60 90 ns VCC e 10V CL e 50 pF 40 70 ns VCC e 5V CL e 150 pF 80 110 ns VCC e 10V CL e 150 pF 60 90 ns MM54C244MM74C244 VCC e 5V CL e 50 pF 45 70 ns VCC e 10V CL e 50 pF 25 50 ns VCC e 5V CL e 150 pF 60 90 ns VCC e 10V CL e 150 pF 40 70 ns t1H t0H Propagation Delay Output RL e 1k CL e 50 pF Disable to High Impedance VCC e 5V 45 80 ns State (from a Logic Level) VCC e 10V 35 60 ns tH1 tH0 Propagation Delay Output RL e 1k CL e 50 pF Disable to Logic Level VCC e 5V 50 90 ns (from High Impedance State) VCC e 10V 30 60 ns tT(HL) tT(LH) Transition Time VCC e 5V CL e 50 pF 45 80 ns VCC e 10V CL e 50 pF 30 60 ns VCC e 5V CL e 150 pF 75 140 ns VCC e 10V CL e 150 pF 50 100 ns CPD Power Dissipation (Note 3) Capacitance (Output Enabled per Buffer) MM54C240MM74C240 100 pF MM54C244MM74C244 100 pF (Output Disabled per Buffer) MM54C240MM74C240 10 pF MM54C244MM74C244 0 pF CIN Input Capacitance VIN e 0V f e 1 MHz TA e 25 C 10 pF (Any Input) CO Output Capacitance VIN e 0V f e 1 MHz TA e 25 C 10 pF (Output Disabled) AC Parameters are guaranteed by DC correlated testing Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Range’’ they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device operation Note 2 Capacitance is guaranteed by periodic testing Note 3 CPD determines the no load AC power consumption of any CMOS device For complete explanation see 54C74C Family Characteristics Application Note AN-90 Typical Application TLF5905 – 5 3 |
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