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MM54C74N Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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MM54C74N Datasheet(HTML) 1 Page - National Semiconductor (TI) |
1 / 6 page TLF5885 February 1988 MM54C74MM74C74 Dual D Flip-Flop General Description The MM54C74MM74C74 dual D flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors Each flip- flop has independent data preset clear and clock inputs and Q and Q outputs The logic level present at the data input is transferred to the output during the positive going transition of the clock pulse Preset or clear is independent of the clock and accomplished by a low level at the preset or clear input Features Y Supply voltage range 3V to 15V Y Tenth power TTL compatible Drive 2 LPT2L loads Y High noise immunity 045 VCC (typ) Y Low power 50 nW (typ) Y Medium speed operation 10 MHz (typ) with 10V supply Applications Y Automotive Y Data terminals Y Instrumentation Y Medical electronics Y Alarm system Y Industrial electronics Y Remote metering Y Computers Logic Diagram TLF5885 – 1 Truth Table Preset Clear Qn Qn 00 0 0 01 1 0 10 0 1 11 Qn Qn No change in output from previous state Order Number MM54C74 or MM74C74 Connection Diagram Dual-In-Line Package TLF5885 – 2 Top View Note A logic ‘‘0’’ on clear sets Q to logic ‘‘0’’ A logic ‘‘0’’ on preset sets Q to logic ‘‘1’’ C1995 National Semiconductor Corporation RRD-B30M105Printed in U S A |
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