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HD404616H Datasheet(PDF) 9 Page - Hitachi Semiconductor |
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HD404616H Datasheet(HTML) 9 Page - Hitachi Semiconductor |
9 / 89 page HD404618 Series 9 RAM Memory Map The MCU contains a 1,184-digit × 4-bit RAM area consisting of a data area and a stack area. In addition, interrupt control bits and special registers are mapped onto the same RAM memory space outside this area. The RAM memory map is shown in figure 2, and described below. Interrupt Control Bits Area ($000–$003): Used for interrupt control bits and the bit register (figure 3). The register flag area consists of LSON, WDON, TGSP, and DTON flags. Both areas can be accessed only by RAM bit manipulation instructions. In addition, note that the interrupt request flag cannot be set by software, the RSP bit is used only to reset the stack pointer. Limitations on using the instructions are shown in figure 4. Register Flag Area ($020–$023): Consist of the LSON, WDON, TGSP, and DTON flags which are bit registers accessible by RAM bit manipulation instructions. The WDON flag can only be set, only by the SEM/SEMD instruction. The TGSP flag can be set and reset by the SEM/SEMD and REM/REMD instructions. The DTON flag can be set, reset, and tested by the SEM/SEMD, REM/REMD, and TMD instructions. Note that the DTON flag is active only in subactive mode, and is normally reset in active mode. Special Function Registers Area ($004–$01F, $024–$03F): Used as mode or data registers for serial interface, timer/counters, LCD, and DTMF, and as data control registers for I/O ports. These registers are classified into three types: write-only, read-only, and read/write as shown in figure 2. The SEM/REM and SEMD/REMD instructions can be used for the LCD control register (LCR), but RAM bit manipulation instructions cannot be used for other registers. LCD Data Area ($050–$06F): Used for storing LCD data which is automatically output to LCD segments as display data. Data 1 lights the corresponding LCD segment; data 0 extinguishes it. This area can be used as data area. Data Area ($040–$2CF, $100–$2CF; Bank 0, 1): The memory registers (MR), which consist of 16 digits ($040–$04F), can be accessed by the LAMR and XMRA instructions (see figure 5). In the 464 digits from $100–$2CF, a bank can be selected by the V register (see section on V register). Stack Area ($3C0–$3FF): Used for saving the contents of the program counter (PC), status flag (ST), and carry flag (CA) at subroutine call (CAL or CALL instruction) and interrupt processing. This area can be used as a 16-level nesting subroutine stack in which one level requires four digits. The data to be saved and the save conditions are shown in figure 5. The program counter is restored by either the RTN or RTNI instruction, but the status and carry flags can only be restored by the RTNI instruction. Any unused space in this area is used for data storage. |
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