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HM5264405FTT-75 Datasheet(PDF) 10 Page - Hitachi Semiconductor

Part # HM5264405FTT-75
Description  64M LVTTL interface SDRAM 133 MHz/100 MHz
Download  67 Pages
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Manufacturer  HITACHI [Hitachi Semiconductor]
Direct Link  http://www.renesas.com/eng
Logo HITACHI - Hitachi Semiconductor

HM5264405FTT-75 Datasheet(HTML) 10 Page - Hitachi Semiconductor

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HM5264165F/HM5264805F/HM5264405F-75/A60/B60
10
V
SS and VSSQ (power supply pins): Ground is connected. (VSS is for the internal circuit and VSSQ is for the
output buffer.)
Command Operation
Command Truth Table
The SDRAM recognizes the following commands specified by the
CS, RAS, CAS, WE and address pins.
CKE
Command
Symbol
n - 1 n
CS RAS CAS WE A12/A13 A10
A0
to A11
Ignore command
DESL
H
×
H
×××
×
×
×
No operation
NOP
H
×
L
HHH
××
×
Burst stop in full page
BST
H
×
L
HHL
××
×
Column address and read command
READ
H
×
LH
L
H
V
L
V
Read with auto-precharge
READ A
H
×
LH
L
H
V
H
V
Column address and write command
WRIT
H
×
LH
L
L
V
L
V
Write with auto-precharge
WRIT A
H
×
LH
L
L
V
H
V
Row address strobe and bank active
ACTV
H
×
LL
H
H
V
V
V
Precharge select bank
PRE
H
×
LL
H
L
V
L
×
Precharge all bank
PALL
H
×
LL
H
L
×
H
×
Refresh
REF/SELF H
V
L
L
L
H
××
×
Mode register set
MRS
H
×
L
LLL
V
V
V
Note:
H: V
IH.
L: V
IL. ×: VIH or VIL.
V: Valid address input
Ignore command [DESL]: When this command is set (
CS is High), the SDRAM ignore command input at
the clock. However, the internal status is held.
No operation [NOP]: This command is not an execution command. However, the internal operations
continue.
Burst stop in full-page [BST]: This command stops a full-page burst operation (burst length = full-page
(256; HM5264165F, 512; HM5264805F, 1024; HM5264405F)), and is illegal otherwise.
When data
input/output is completed for a full page of data, it automatically returns to the start address, and input/output
is performed repeatedly.


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