10

256 x 18, 512 x 18, 1,024 x 18, 2,048 x 18 and 4,096 x 18

COMMERCIALANDINDUSTRIAL

TEMPERATURERANGES

When the

LD pin is LOW and WEN is HIGH, the WCLK input is disabled;

thenasignalatthisinputcanneitherincrementthewriteoffsetregisterpointer,

nor execute a write.

The contents of the offset registers can be read on the output lines when

the

LDpinissetLOWandRENissetLOW;then,datacanbereadontheLOW-

to-HIGH transition of the Read Clock (RCLK). The act of reading the control

registersemploysadedicatedreadoffsetregisterpointer.(Thereadandwrite

pointersoperateindependently). Offsetregistercontentcanbereadoutinthe

IDT Standard mode only. It is inhibited in the FWFT mode.

A read and a write should not be performed simultaneously to the offset

registers.

FIRST LOAD (

FL)

For the single device mode, see Table 3 for additional information. In the

DaisyChainDepthExpansionconfiguration,

FLisgroundedtoindicateitisthe

first device loaded and is set to HIGH for all other devices in the Daisy Chain.

(See Operating Configurations for further details.)

WRITE EXPANSION INPUT (

WXI)

This is a dual purpose pin. For single device mode, see Table 3 for

additionalinformation.

WXIisconnectedtoWriteExpansionOut(WXO)ofthe

previous device in the Daisy Chain Depth Expansion mode.

READ EXPANSION INPUT (

RXI)

This is a dual purpose pin. For single device mode, see Table 3 for

additional information.

RXIisconnectedtoReadExpansionOut(RXO)ofthe

previous device in the Daisy Chain Depth Expansion mode.

OUTPUTS:

FULL FLAG/INPUT READY (

FF/IR)

This is a dual purpose pin. In IDT Standard mode, the Full Flag (

FF)

functionisselected.WhentheFIFOisfull,

FFwillgoLOW,inhibitingfurtherwrite

operations. When

FF isHIGH,theFIFOisnotfull. Ifnoreadsareperformed

after a reset,

FF will go LOW after D writes to the FIFO. D = 256 writes for the

IDT72V205, 512 for the IDT72V215, 1,024 for the IDT72V225, 2,048 for the

IDT72V235 and 4,096 for the IDT72V245.

In FWFT mode, the Input Ready (

IR) function is selected. IR goes LOW

when memory space is available for writing in data. When there is no longer

any free space left,

IR goes HIGH, inhibiting further write operations.

IRwillgoHIGHafterDwritestotheFIFO. D=257writesfortheIDT72V205,

513 for the IDT72V215, 1,025 for the IDT72V225, 2,049 for the IDT72V235

and 4,097 for the IDT72V245. Note that the additional word in FWFT mode

is due to the capacity of the memory plus output register.

FF/IR is synchronous and updated on the rising edge of WCLK.

EMPTY FLAG/OUTPUT READY (

EF/OR)

This is a dual purpose pin. In the IDT Standard mode, the Empty Flag (

EF)

functionisselected. WhentheFIFOisempty,

EFwillgoLOW,inhibitingfurther

read operations. When

EF is HIGH, the FIFO is not empty.

InFWFTmode,theOutputReady(

OR)functionisselected.ORgoesLOW

at the same time that the first word written to an empty FIFO appears valid on

the outputs.

ORstaysLOWaftertheRCLKLOWtoHIGHtransitionthatshifts

the last word from the FIFO memory to the outputs.

ORgoesHIGHonlywith

a true read (RCLK with

REN=LOW). Thepreviousdatastaysattheoutputs,

indicating the last word was read. Further data reads are inhibited until

OR

goes LOW again.

EF/OR is synchronous and updated on the rising edge of RCLK.

PROGRAMMABLE ALMOST-FULL FLAG (

PAF)

The Programmable Almost-Full Flag (

PAF) will go LOW when FIFO

reaches the almost-full condition. In IDT Standard mode, if no reads are

performed after Reset (

RS), the PAF will go LOW after (256-m) writes for the

IDT72V205, (512-m) writes for the IDT72V215, (1,024-m) writes for the

IDT72V225, (2,048–m) writes for the IDT72V235 and (4,096–m) writes for the

IDT72V245. The offset “m” is defined in the Full Offset register.

In FWFT mode, if no reads are performed,

PAF will go LOW after 257-m

for the IDT72V205, 513-m for the IDT72V215, 1,025 for the IDT72V225, 2,049

for the IDT72V235 and 4,097 for the IDT72V245. The default values for m are

noted in Table 1 and 2.

If asynchronous

PAFconfigurationisselected,the PAF is asserted LOW

ontheLOW-to-HIGHtransitionoftheWriteClock(WCLK).

PAFisresettoHIGH

ontheLOW-to-HIGHtransitionoftheReadClock(RCLK).Ifsynchronous

PAF

configuration is selected (see Table 3), the

PAFisupdatedontherisingedge

ofWCLK.

PROGRAMMABLE ALMOST-EMPTY FLAG (

PAE)

The

PAE flag will go LOW when the FIFO reaches the almost-empty

condition. In IDT Standard mode,

PAE will go LOW when there are n words

or less in the FIFO. In FWFT mode, the

PAEwillgoLOWwhentherearen + 1

wordsorlessintheFIFO.Theoffset"n"isdefinedastheemptyoffset. Thedefault

values for n are noted in Table 1 and 2.

If there is no empty offset specified, the Programmable Almost-Empty Flag

(

PAE) will be LOW when the device is 31 away from completely empty for

IDT72V205, 63 away from completely empty for IDT72V215, and 127 away

from completely empty for IDT72V225/72V235/72V245.

Ifasynchronous

PAEconfigurationisselected,thePAEisassertedLOWon

the LOW-to-HIGH transition of the Read Clock (RCLK).

PAE isresettoHIGH

ontheLOW-to-HIGHtransitionoftheWriteClock(WCLK).Ifsynchronous

PAE

configuration is selected (see Table 3), the

PAEisupdatedontherisingedge

of RCLK.

WRITE EXPANSION OUT/HALF-FULL FLAG (

WXO/HF)

This is a dual-purpose output. In the Single Device and Width Expansion

mode, when Write Expansion In (

WXI) and/or Read Expansion In (RXI) are

grounded, this output acts as an indication of a half-full memory.

Afterhalfofthememoryisfilled,andattheLOW-to-HIGHtransitionofthenext

write cycle, the Half-Full Flag goes LOW and will remain set until the difference

between the write pointer and read pointer is less than or equal to one half of

the total memory of the device. The Half-Full Flag (

HF) is then reset to HIGH

by the LOW-to-HIGH transition of the Read Clock (RCLK). The

HF is

asynchronous.

In the Daisy Chain Depth Expansion mode,

WXI is connected to WXO of

the previous device. This output acts as a signal to the next device in the Daisy

Chain by providing a pulse when the previous device writes to the last location

of memory.

READ EXPANSION OUT (

RXO)

In the Daisy Chain Depth Expansion configuration, Read Expansion In

(

RXI)isconnectedtoReadExpansionOut(RXO)ofthepreviousdevice.This

outputactsasasignaltothenextdeviceintheDaisyChainbyprovidingapulse

when the previous device reads from the last location of memory.

DATA OUTPUTS (Q0-Q17)