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AK7735EQ Datasheet(PDF) 9 Page - Asahi Kasei Microsystems |
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AK7735EQ Datasheet(HTML) 9 Page - Asahi Kasei Microsystems |
9 / 142 page [AK7735] 016014707-E-00 2016/12 - 9 - No. Pin Name I/O Function Supply Power 23 STO O Status Output Pin This pin outputs “L” during power-down state. TVDD RDY O RDY Signal Output Pin SDOUT2 O Serial Data Output 2 Pin 24 CSN I SPI Mode SPI I/F Chip Select Pin During power-down state or when SPI I/F is not in use, leave this pin “H” level. TVDD I I 2C Mode I 2C I/F Chip Address Pin This pin must be pulled up or pulled down. 25 SO O Serial Data Output Pin for SPI I/F This pin outputs “Hi-Z” during power-down state. This pin must be pulled up or pulled down. TVDD SDA I/O Serial Data In/Output Pin for I 2C I/F This pin outputs “Hi-Z” during power-down state. 26 SCLK I Serial Data Clock Input Pin for SPI I/F TVDD SCL I Serial Data Clock Input Pin for I 2C I/F 27 SI I Serial Data Input Pin for SPI I/F TVDD I2CFIL I I 2C I/F Mode Select Input Pin I2CFIL = “L”: Fast Mode (400kHz) I2CFIL = “H”: Fast Mode Plus (1MHz) (should be fixed to TVDD2) 28 PDN I Power-down Pin Use this pin to power down the AK7735. The PDN pin should be held “L” when power is supplied. TVDD 29 AVDRV O VREG Output Pin Connect a 2.2uF(±30%) ceramic capacitor between this pin and DVSS3. Do not connect this pin to an external circuit. LVDD 30 DVSS3 - Digital Ground 3 Pin 0V - 31 LVDD - Digital Core Power Supply Pin 3.0~3.6V (typ.3.3V) - |
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