Page 1 of 13

Document No. DOC-81482-1 │ www.psemi.com

©2017 Peregrine Semiconductor Corp. All rights reserved.

Product Description

The PE4312 is a 50Ω, HaRP™ technology-enhanced 6-bit

RF Digital Step Attenuator (DSA) designed for use in 3G/4G

wireless infrastructure and other high performance RF

applications.

This DSA is a pin-compatible upgraded version of the

PE4302 with higher linearity, improved attenuation accuracy

and faster switching speed. An integrated digital control

interface supports both serial and parallel programming of

the attenuation, including the capability to program an initial

attenuation state at power-up.

Covering a 31.5 dB attenuation range in 0.5 dB steps, it

maintains high linearity and low power consumption from

1 MHz through 4 GHz. PE4312 also features an external

negative supply option, and is offered in a 20-lead 4 × 4 mm

QFN package. In addition, no external blocking capacitors

are required if 0 VDC is present on the RF ports.

process, a patented variation of silicon-on-insulator (SOI)

technology on a sapphire substrate.

Peregrine’s HaRP™ technology enhancements deliver high

linearity and excellent harmonics performance. It is an

performance of GaAs with the economy and integration of

conventional CMOS.

Product Specification

6-bit, 31.5 dB, 1 MHz–4 GHz

Figure 1. Functional Schematic Diagram

PE4312

Features



±(0.10 + 1% x Atten) @ 1 GHz



±(0.15 + 2% x Atten) @ 2.2 GHz



±(0.15 + 8% x Atten) @ 4 GHz



Direct parallel



Latched parallel



Serial



Pin compatible to PE4302, PE4305

and PE4306

Control Logic Interface

Parallel Control

Power-Up Control

Serial Control

RF Input

RF Output

Switched Attenuator Array

6

3

2

Figure 2. Package Type

20-lead 4 × 4 mm QFN

DOC-02132