PG

1

2

3

6

5

4

EN

SW

GND

VIN

FB

NC/PG

1

2

3

6

5

4

EN

SW

GND VIN

FB

1

2

3

5

4

EN

SW

GND

VIN

FB

SOT23-5

DBV Package

(Top View)

SOT23-6

DDC Package

(Top View)

SOT563-6

DRL Package

(Top View)

3

TLV62569, TLV62569P

www.ti.com

SLVSDG1A – DECEMBER 2016 – REVISED MARCH 2017

Product Folder Links: TLV62569 TLV62569P

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Copyright © 2016–2017, Texas Instruments Incorporated

(1)

For detailed ordering information, please check Mechanical, Packaging, Orderable Information at the end of this datasheet.

(2)

Product preview

6 Device Options

FUNCTION

PACKAGE MARKING

PACKAGE

TLV62569DBV

-

16AF

SOT23-5

Power Good

SOT23-6

-

SOT563-6

Power Good

SOT563-6

7 Pin Configuration and Functions

Pin Functions

PIN NUMBER

I/O/PW

R

DESCRIPTION

NAME

SOT23-5

SOT23-6

SOT563-6

EN

1

1

5

I

Device enable logic input. Logic high enables the device, logic low disables the

device and turns it into shutdown. Do not leave floating.

GND

2

2

2

PWR

Ground pin.

SW

3

3

4

PWR

Switch pin connected to the internal FET switches and inductor terminal. Connect

the inductor of the output filter to this pin.

VIN

4

4

3

PWR

Power supply voltage input.

PG

-

5

6

O

Power good open drain output pin for TLV62569P. The pull-up resistor should not

be connected to any voltage higher than 5.5V. If it's not used, leave the pin

floating.

FB

5

6

1

I

Feedback pin for the internal control loop. Connect this pin to an external

feedback divider.

NC

-

-

6

O

No connection pin for TLV62569DRL. The pin can be connected to the output or

the ground. Or leave it floating.