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SiC781DB Datasheet(PDF) 4 Page - Vishay Siliconix |
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SiC781DB Datasheet(HTML) 4 Page - Vishay Siliconix |
4 / 14 page SiC781CD www.vishay.com Vishay Siliconix S14-1638. B, 25-Aug-14 4 Document Number: 62950 For technical questions, contact: powerictechsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 ELECTRICAL SPECIFICATIONS PARAMETER SYMBOL TEST CONDITIONS UNLESS OTHERWISE SPECIFIED (DSBL# = ZCD_EN = 5 V, VIN = 12 V, VDRV = VCIN = 5 V, TA = 25 °C) MIN. TYP. (1) MAX. UNIT POWER SUPPLIES Control Logic Supply Current IVCIN VDSBL# = 0 V, no switching -85 - μA VDSBL# = 5 V, no switching - 275 - VDSBL# = 5 V, fs = 300 kHz, D = 0.1 - 300 - Drive Supply Current IVDRV fs = 300 kHz, D = 0.1 -15 24 mA fs = 1 MHz, D = 0.1 -45 - VDSBL# = 0 V, no switching -35 - μA VDSBL# = 5 V, no switching -45 - BOOTSTRAP SUPPLY Bootstrap Switch Forward Voltage VF IF = 2 mA -- 0.4 V PWM CONTROL INPUT Rising Threshold VTH_PWM_R 3.4 3.7 4.2 V Falling Threshold VTH_PWM_F 0.7 0.9 1.2 Tri-state Rising Threshold VTH_TRI_R 0.9 1.2 1.5 Tri-state Falling Threshold VTH_TRI_F 33.4 3.7 Tri-state Rising Threshold Hysteresis VHYS_TRI_R - 250 - mV Tri-state Falling Threshold Hysteresis VHYS_TRI_F - 350 - DRIVER TIMING Tri-state to GH/GL Rising Propagation Delay tPD_TRI_R -30 - ns Tri-state GH Hold-Off Time tTSHO_GH PWM high to tri-state - 35 - Tri-state GL Hold-Off Time tTSHO_GL PWM low to tri-state - 120 - GH - Turn Off Propagation Delay tPD_OFF_GH -20 - GH - Turn On Propagation Delay (Dead time rising) tPD_ON_GH -8 - GL - Turn Off Propagation Delay tPD_OFF_GL -12 - GL - Turn On Propagation Delay (Dead time falling) tPD_ON_GL -8 - DSBL# High to GH/GL Rising Propagation Delay tPD_DSBL#_R Fig. 5 - 20 - DSBL# Low to GH/GL Falling Propagation Delay tPD_DSBL#_F -15 - DSBL#, ZCD_EN INPUT DSBL# Logic Input Voltage VIH_DSBL# Input logic high 2 - - V VIL_DSBL# Input logic low - - 0.8 ZCD_EN Logic Input Voltage VIH_ZCD_EN Input logic high 2 - - VIL_ZCD_EN Input logic low - - 0.8 |
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