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BQ25601RTWT Datasheet(PDF) 11 Page - Texas Instruments |
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BQ25601RTWT Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 60 page  11 bq25601 www.ti.com SLUSCK5 – MARCH 2017 Product Folder Links: bq25601 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Electrical Characteristics (continued) VVAC_UVLOZ < VVAC < VVAC_OV and VVAC > VBAT + VSLEEP, TJ = –40°C to 125°C and TJ = 25°C for typical values (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT (1) Specified by design. Not production tested. CHARGE OVERCURRENT COMPARATOR (CYCLE-BY-CYCLE) IHSFET_OCP HSFET cycle-by-cycle over- current threshold 5.2 8.0 A IBATFET_OCP System over load threshold 6.0 A CHARGE UNDER-CURRENT COMPARATOR (CYCLE-BY-CYCLE) VLSFET_UCP LSFET under-current falling threshold From sync mode to non-sync mode 160 mA PWM fSW PWM switching frequency Oscillator frequency, buck mode 1320 1500 1680 kHz Oscillator frequency, boost mode 1150 1412 1660 kHz DMAX Maximum PWM duty cycle(1) 97% BOOST MODE OPERATION VOTG_REG Boost mode regulation voltage VVBAT = 3.8 V, I(PMID) = 0 A, BOOSTV[1:0] = '10' = 5.15 V 4.972 5.126 5.280 V VOTG_REG_ACC Boost mode regulation voltage accuracy VVBAT = 3.8 V, I(PMID) = 0 A, BOOSTV[1:0] = '10' = 5.15 V -3 3 % VBATLOWV_OTG Battery voltage exiting boost mode VVBAT falling, MIN_VBAT_SEL (REG01[0]) = 0 2.6 2.8 2.9 V VVBAT rising, MIN_VBAT_SEL (REG01[0]) = 0 2.9 3.0 3.15 V VVBAT falling, MIN_VBAT_SEL (REG01[0]) = 1 2.4 2.5 2.6 V VVBAT rising, MIN_VBAT_SEL (REG01[0]) = 1 2.7 2.8 2.9 V IOTG OTG mode output current BOOST_LIM (REG02[7]) = 1 1.2 1.4 1.6 A IOTG_OCP_ACC Boost mode RBFET over-current protection accuracy BOOST_LIM = 0.5 A (REG02[7] = 0) 0.5 0.722 A VOTG_OVP OTG overvoltage threshold Rising threshold 5.55 5.8 6.15 V IOTG_HSZCP HSFET under current falling threshold 100 mA REGN LDO VREGN REGN LDO output voltage VVBUS = 9V, IREGN = 40mA 5.6 6 6.55 V VREGN REGN LDO output voltage VVBUS = 5V, IREGN = 20mA 4.6 4.7 4.8 V LOGIC I/O PIN CHARACTERISTICS (CE, PSEL, SCL, SDA,, INT) VILO Input low threshold CE 0.4 V VIH Input high threshold CE 1.3 V IBIAS High-level leakage current CE Pull up rail 1.8 V 1 µA VILO Input low threshold PSEL 0.4 V VIH Input high threshold PSEL 1.3 V IBIAS High-level leakage current PSEL Pull up rail 1.8V 1 µA LOGIC I/O PIN CHARACTERISTICS (PG, STAT) VOL Low-level output voltage 0.4 V |
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