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HPA01215RHAR Datasheet(PDF) 11 Page - Texas Instruments |
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HPA01215RHAR Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 34 page  CC2541 www.ti.com SWRS110D – JANUARY 2012 – REVISED JUNE 2013 ADC CHARACTERISTICS TA = 25°C and VDD = 3 V PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Input voltage VDD is voltage on AVDD5 pin 0 VDD V External reference voltage VDD is voltage on AVDD5 pin 0 VDD V External reference voltage differential VDD is voltage on AVDD5 pin 0 VDD V Input resistance, signal Simulated using 4-MHz clock speed 197 k Ω Full-scale signal(1) Peak-to-peak, defines 0 dBFS 2.97 V Single-ended input, 7-bit setting 5.7 Single-ended input, 9-bit setting 7.5 Single-ended input, 10-bit setting 9.3 Single-ended input, 12-bit setting 10.3 Differential input, 7-bit setting 6.5 ENOB(1) Effective number of bits bits Differential input, 9-bit setting 8.3 Differential input, 10-bit setting 10 Differential input, 12-bit setting 11.5 10-bit setting, clocked by RCOSC 9.7 12-bit setting, clocked by RCOSC 10.9 Useful power bandwidth 7-bit setting, both single and differential 0–20 kHz Single ended input, 12-bit setting, –6 dBFS(1) –75.2 THD Total harmonic distortion dB Differential input, 12-bit setting, –6 dBFS(1) –86.6 Single-ended input, 12-bit setting(1) 70.2 Differential input, 12-bit setting(1) 79.3 Signal to nonharmonic ratio dB Single-ended input, 12-bit setting, –6 dBFS(1) 78.8 Differential input, 12-bit setting, –6 dBFS(1) 88.9 Differential input, 12-bit setting, 1-kHz sine CMRR Common-mode rejection ratio >84 dB (0 dBFS), limited by ADC resolution Single ended input, 12-bit setting, 1-kHz sine Crosstalk >84 dB (0 dBFS), limited by ADC resolution Offset Midscale –3 mV Gain error 0.68% 12-bit setting, mean(1) 0.05 DNL Differential nonlinearity LSB 12-bit setting, maximum(1) 0.9 12-bit setting, mean(1) 4.6 12-bit setting, maximum(1) 13.3 INL Integral nonlinearity LSB 12-bit setting, mean, clocked by RCOSC 10 12-bit setting, max, clocked by RCOSC 29 Single ended input, 7-bit setting(1) 35.4 Single ended input, 9-bit setting(1) 46.8 Single ended input, 10-bit setting(1) 57.5 Single ended input, 12-bit setting(1) 66.6 SINAD Signal-to-noise-and-distortion dB (–THD+N) Differential input, 7-bit setting(1) 40.7 Differential input, 9-bit setting(1) 51.6 Differential input, 10-bit setting(1) 61.8 Differential input, 12-bit setting(1) 70.8 7-bit setting 20 9-bit setting 36 Conversion time μs 10-bit setting 68 12-bit setting 132 (1) Measured with 300-Hz sine-wave input and VDD as reference. Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: CC2541 |
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