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PC97338 Datasheet(PDF) 9 Page - National Semiconductor (TI) |
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PC97338 Datasheet(HTML) 9 Page - National Semiconductor (TI) |
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9 / 221 page  9 www.national.com 5.13 ARCHITECTURAL DESCRIPTION .............................................................................................. 153 5.14 BANK 0 ......................................................................................................................................... 153 5.14.1 TXD/RXD – Transmit/Receive Data Ports ........................................................................... 153 5.14.2 IER – Interrupt Enable Register .......................................................................................... 154 5.14.3 EIR/FCR – Event Identification/FIFO Control Registers ...................................................... 154 5.14.4 LCR/BSR – Link Control/Bank Select Register ................................................................... 157 5.14.5 MCR – Modem/Mode Control Register ............................................................................... 159 5.14.6 LSR – Link Status Register ................................................................................................. 160 5.14.7 MSR – Modem Status Register ........................................................................................... 162 5.14.8 SPR/ASCR – Scratchpad/Auxiliary Status and Control Register ........................................ 162 5.15 BANK 1 ......................................................................................................................................... 163 5.15.1 LBGD – Legacy Baud Generator Divisor Port ..................................................................... 164 5.15.2 LCR/BSR – Link Control/Bank Select Registers ................................................................. 164 5.16 BANK 2 ......................................................................................................................................... 164 5.16.1 BGD – Baud Generator Divisor Port ................................................................................... 164 5.16.2 EXCR1 – Extended Control Register 1 ............................................................................... 166 5.16.3 LCR/BSR – Link Control/Bank Select Registers ................................................................. 167 5.16.4 EXCR2 – Extended Control Register 2 ............................................................................... 167 5.16.5 TXFLV – TX_FIFO Level, Read-Only .................................................................................. 168 5.16.6 RXFLV – RX_FIFO Level, Read-Only ................................................................................. 168 5.17 BANK 3 ......................................................................................................................................... 168 5.17.1 MID – Module Identification Register, Read Only ............................................................... 168 5.17.2 SH_LCR – Link Control Register Shadow, Read Only ........................................................ 168 5.17.3 SH_FCR – FIFO Control Register Shadow, Read-Only ...................................................... 168 5.17.4 LCR/BSR – Link Control/Bank Select Registers ................................................................. 168 5.18 BANK 4 ......................................................................................................................................... 169 5.18.1 TMR – Timer Register ......................................................................................................... 169 5.18.2 IRCR1 – Infrared Control Register 1 ................................................................................... 169 5.18.3 LCR/BSR – Link Control/Bank Select Registers ................................................................. 169 5.18.4 TFRL/TFRCC – Transmitter Frame-Length/Current-Count ................................................. 170 5.18.5 RFRML/RFRCC – Receiver Frame Maximum-Length/Current-Count ................................ 170 5.19 BANK 5 ......................................................................................................................................... 170 5.19.1 P_BGD – Pipelined Baud Generator Divisor Register ........................................................ 170 5.19.2 P_MDR – Pipelined Mode Register ..................................................................................... 170 5.19.3 LCR/BSR – Link Control/Bank Select Registers ................................................................. 171 5.19.4 IRCR2 – Infrared Control Register 2 ................................................................................... 171 5.19.5 ST_FIFO – Status FIFO ...................................................................................................... 172 5.20 BANK 6 ......................................................................................................................................... 173 5.20.1 IRCR3 – Infrared Control Register 3 ................................................................................... 173 5.20.2 MIRPW – MIR Pulse Width Register ................................................................................... 173 5.20.3 SIR_PW – SIR Pulse Width Register .................................................................................. 174 5.20.4 LCR/BSR – Link Control/Bank Select Registers ................................................................. 174 5.20.5 BFPL – Beginning Flags/Preamble Length Register ........................................................... 174 5.21 BANK 7 ......................................................................................................................................... 175 5.21.1 IRRXDC – Infrared Receiver Demodulator Control Register .............................................. 175 |
Similar Part No. - PC97338 |
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Similar Description - PC97338 |
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