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HPA01057EDR Datasheet(PDF) 4 Page - Texas Instruments |
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HPA01057EDR Datasheet(HTML) 4 Page - Texas Instruments |
4 / 29 page SN65HVD485E SLLS612E – JUNE 2004 – REVISED DECEMBER 2015 www.ti.com 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) MIN MAX UNIT VCC Supply voltage –0.5 7 V Voltage range at A or B –9 14 V Voltage range at any logic pin –0.3 VCC + 0.3 V Receiver output current –24 24 mA Voltage input range, transient pulse, A and B, through 100 Ω (see Figure 15) –50 50 V TJ Junction temperature 170 170 °C Continuous total power dissipation Refer to Dissipation Ratings Tstg Storage temperature –65 130 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal. 7.2 ESD Ratings VALUE UNIT Bus pins and GND ±15000 Human body model (HBM), per ANSI/ESDA/JEDEC JS- Electrostatic 001(1) V(ESD) All pins ±4000 V discharge Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1000 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 7.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) (1) MIN NOM MAX UNIT VCC Supply voltage 4.5 5.5 V VI Input voltage at any bus terminal (separately or common mode) –7 12 V VIH High-level input voltage (D, DE, or RE inputs) 2 VCC V VIL Low-level input voltage (D, DE, or RE inputs) 0 0.8 V VID Differential input voltage –12 12 V Driver –60 60 IO Output current mA Receiver –8 8 RL Differential load resistance 54 60 Ω 1/tUI Signaling rate 0 10 Mbps TA Operating free-air temperature –40 85 °C TJ Junction temperature(2) –40 130 °C (1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum, is used in this data sheet. (2) See Thermal Information for information on maintenance of this specification for the DGK package. 4 Submit Documentation Feedback Copyright © 2004–2015, Texas Instruments Incorporated Product Folder Links: SN65HVD485E |
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