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SN65LVDT2DBVT Datasheet(PDF) 11 Page - Texas Instruments |
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SN65LVDT2DBVT Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 42 page  VID VO 10 pF, 2 Places 15 pF 100 Ω† 1000 Ω 1000 Ω 100 Ω VIC VID VO VID VO VIT+ 0 V −100 mV 100 mV 0 V VIT− † Remove for testing LVDT device. NOTE: Input signal of 3 Mpps, duration of 167 ns, and transition time of < 1 ns. NOTE: Input signal of 3 Mpps, duration of 167 ns, and transition time of <1 ns. + − SN65LVDS1, SN65LVDS2, SN65LVDT2 www.ti.com SLLS373L – JULY 1999 – REVISED DECEMBER 2014 Parameter Measurement Information (continued) Figure 12. VIT+ and VIT– Input Voltage Threshold Test Circuit and Definitions Copyright © 1999–2014, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: SN65LVDS1 SN65LVDS2 SN65LVDT2 |
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