4

SN65HVD3082E, SN75HVD3082E, SN65HVD3085E, SN65HVD3088E

SLLS562I – AUGUST 2009 – REVISED SEPTEMBER 2016

www.ti.com

Product Folder Links: SN65HVD3082E SN75HVD3082E SN65HVD3085E SN65HVD3088E

Submit Documentation Feedback

Copyright © 2009–2016, Texas Instruments Incorporated

(1)

The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.

6.3 Recommended Operating Conditions

over operating free-air temperature range unless otherwise noted

(1)

MIN

NOM

MAX

UNIT

4.5

5.5

V

–7

12

2

V

0

0.8

V

–12

12

V

Driver

–60

60

mA

Receiver

–8

8

54

60

Ω

SN65HVD3082E, SN75HVD3082E

0.2

Mbps

SN65HVD3085E

1

SN65HVD3088E

20

SN65HVD3082E (D package)

–40

105

°C

SN65HVD3082E (DGK and P packages),

SN65HVD3085E, SN65HVD3088E

–40

85

SN75HVD3082E

0

70

–40

130

°C

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

6.4 Thermal Information

SN65HVD3082E, SN75HVD3082E,

SN65HVD3085E, SN65HVD3088E

SN65HVD3082E,

SN65HVD3088E

UNIT

D (SOIC)

DGK (VSSOP)

P (PDIP)

8 PINS

8 PINS

8 PINS

Junction-to-ambient thermal resistance

130

180

70

°C/W

Junction-to-case (top) thermal resistance

80

66

80

°C/W

Junction-to-board thermal resistance

55

110

40

°C/W

Junction-to-top characterization parameter

7.9

4.6

17.6

°C/W

Junction-to-board characterization parameter

47

73.1

28.3

°C/W