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TLV320AIC3254IRHBT Datasheet(PDF) 9 Page - Texas Instruments |
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TLV320AIC3254IRHBT Datasheet(HTML) 9 Page - Texas Instruments |
9 / 53 page TLV320AIC3254 www.ti.com SLAS549D – SEPTEMBER 2008 – REVISED NOVEMBER 2014 Electrical Characteristics, ADC (continued) At 25°C, AVDD, DVDD, IOVDD = 1.8V, LDOIN = 3.3V, AVDD and DVDD LDO disabled, fs (Audio) = 48kHz, Cref = 10µF on REF pin, PLL disabled unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT AUDIO ADC Input signal level (0dB) Differential Input, CM = 0.9V 10 mV 1kHz sine wave input, Differential configuration IN1_L and IN1_R routed to Right ADC IN2_L and IN2_R routed to Left ADC Device Setup Rin = 10K, fs = 48kHz, AOSR = 128 MCLK = 256* fs PLL Disabled AGC = OFF, Channel Gain = 40dB Processing Block = PRB_R1, Power Tune = PTM_R4 ICN Idle-Channel Noise, A-weighted(1)(2) Inputs ac-shorted to ground, input referred noise 2 μVRMS AUDIO ADC 1kHz sine wave input , Single-ended configuration Rin = 20kΩ fs = 48kHz, AOSR = 128, MCLK = 256 x fs, PLL Disabled Gain Error –0.05 dB AGC = OFF, Channel Gain = 0dB Processing Block = PRB_R1, Power Tune = PTM_R4, CM = 0.9V 1kHz sine wave input at -3dBFS Single-ended configuration IN1_L routed to Left ADC Input Channel Separation 108 dB IN1_R routed to Right ADC, Rin = 20kΩ AGC = OFF, AOSR = 128, Channel Gain = 0dB, CM = 0.9V 1kHz sine wave input at –3dBFS on IN2_L, IN2_L internally not routed. IN1_L routed to Left ADC ac-coupled to ground 1kHz sine wave input at –3dBFS on IN2_R, Input Pin Crosstalk 115 dB IN2_R internally not routed. IN1_R routed to Right ADC ac-coupled to ground Single-ended configuration Rin = 20kΩ, AOSR = 128 Channel, Gain = 0dB, CM = 0.9V 217Hz, 100mVpp signal on AVDD, PSRR Single-ended configuration, Rin = 20kΩ, 55 dB Channel Gain = 0dB; CM = 0.9V Single-Ended, Rin = 10kΩ, PGA gain set to 0dB 0 dB Single-Ended, Rin = 10kΩ, PGA gain set to 47.5dB 47.5 dB Single-Ended, Rin = 20kΩ, PGA gain set to 0dB –6 dB ADC programmable gain amplifier gain Single-Ended, Rin = 20kΩ, PGA gain set to 47.5dB 41.5 dB Single-Ended, Rin = 40kΩ, PGA gain set to 0dB –12 dB Single-Ended, Rin = 40kΩ, PGA gain set to 47.5dB 35.5 dB ADC programmable gain amplifier 1-kHz tone 0.5 dB step size Copyright © 2008–2014, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: TLV320AIC3254 |
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