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UM2120 Datasheet(PDF) 7 Page - STMicroelectronics

Part # UM2120
Description  EVALSTGAP1AS: demonstration board for STGAP1AS galvanically isolated single gate driver
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UM2120 Datasheet(HTML) 7 Page - STMicroelectronics

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DocID029823 Rev 1
7/18
UM2120
Connection of two EVALSTGAP1AS boards
18
Lines SD and DIAG1 of both STGAP1AS drivers are shared, whereas it is possible to
independently control IN+ and IN-/DIAG2 pins of each driver through appropriate lines of the
J3master and J3slave.
If the STGAP1AS devices are used in single input configuration both IN-/DIAG2 lines are
independently present on the J4master for interfacing with the µC and diagnostic purposes.
If the two boards are used in half bridge configuration (GNDISOslave and Cmaster plate holes
shall therefore be connected) it is possible to achieve cross conduction prevention by
driving both drivers with only two µC lines as shown in Figure 5.
Figure 5. Half bridge configuration with hardware shoot-through protection
In order to use this configuration the STGAP1AS shall be used as 2-input device and the
JP1 and JP2 jumpers shall be properly set (see Table 9).
Table 9. Jumper configurations for input signal settings
Gate driving configuration
Source of IN+ and IN- control signals Jumper configurations
Single driver (Figure 6)J3
JP1master = DON'T CARE
JP2master = DON'T CARE
Half bridge with hardware
shoot-through protection
(Figure 7)
J3master
JP1master = CLOSED
JP2master = CLOSED
Half bridge with independent
input signals (Figure 8)
J3master for master board
J3slave for slave board
JP1master = OPEN
JP2master = OPEN


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