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TP3404V Datasheet(PDF) 5 Page - National Semiconductor (TI) |
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TP3404V Datasheet(HTML) 5 Page - National Semiconductor (TI) |
5 / 14 page Connection Diagram TLH11924 – 2 Top View Order Number TP3404V See NS Package Number V28A Functional Description The QDASL contains 4 transceivers each of which can in- teroperate with any of the TP340X family of single-channel DASL transceivers Each QDASL transceiver has its own independent line transmit and receive section timing recov- ery circuit scramblerdescrambler and loop activation con- troller Functions which are shared by the 4 transceivers include the Microwire control port and the digital interface with time-slot assignment BURST MODE OPERATION For full-duplex operation over a single twisted-pair burst mode timing is used with the QDASL end of each line act- ing as the loop timing master and the DASL at the terminal being the timing slave (the QDASL transceivers cannot op- erate in loop timing slave mode) Each burst within a DASL line is initiated by the QDASL Master transmitting a startbit for burst framing followed by the B1 B2 and D channel data from 2 consecutive 8 kHz frames combined in the format shown in Figure 1 During transmit bursts the receiver input for that channel is inhibit- ed to avoid disturbing the adaptive circuits The slave’s re- ceiver is enabled at this time and it synchronizes to the start bit of the burst which is always an unscrambled ‘‘1’’ (of the opposite polarity to the last ‘‘1’’ sent in the previous burst) When the slave detects that 36 bits following the start bit have been received it disables the received input waits 6 line symbol periods to match the other end settling guard time and then begins to transmit its burst back towards the master which by this time has enabled its receiver input The burst repetition rate is thus 4 KHz LINE TRANSMIT SECTIONS Alternate Mark Inversion (AMI) line coding in which binary ‘‘1’’s are alternately transmitted as a positive pulse then a negative pulse is used on each DASL line because of its spectral efficiency and null DC energy content All transmit- ted bits excluding the start bit are scrambled by a 9-bit scrambler to provide good spectral spreading with a strong timing content The scrambler feedback polynomial is X9 a X5 a 1 TLH11924 – 3 FIGURE 1 Burst Mode Timing on the Line 5 |
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