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UCC28060D Datasheet(PDF) 4 Page - Texas Instruments |
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UCC28060D Datasheet(HTML) 4 Page - Texas Instruments |
4 / 37 page ELECTRICAL CHARACTERISTICS UCC28060 SLUS767E – MAY 2007 – REVISED NOVEMBER 2008 .................................................................................................................................................... www.ti.com At VCC = 16 V, AGND = PGND = 0 V, VINAC = 3 V, VSENSE = 6 V, HVSEN = 3 V, PHB = 5 V, RTSET = 133 kΩ; all voltages are with respect to GND, all outputs unloaded, –40°C < TJ = TA < +125°C, and currents are positive into and negative out of the specified terminal, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VCC BIAS SUPPLY VCC(shunt) VCC shunt voltage(1) IVCC = 10 mA 22 24 26 V IVCC(stby) VCC current, disabled VSENSE = 0 V 100 200 µA IVCC(on) VCC current, enabled VSENSE = 6 V 5 8 mA UNDERVOLTAGE LOCKOUT (UVLO) VCC(on) VCC turn-on threshold 11.5 12.6 13.5 V VCC(off) VCC turn-off threshold 9.5 10.35 11.5 V UVLO Hysteresis 1.85 2.25 2.65 V REFERENCE VREF VREF output voltage, no load IVREF = 0 mA 5.82 6.00 6.18 V VREF change with load 0 mA ≤ IVREF ≤ –2 mA 1 6 mV VREF change with VCC 12 V ≤ VCC ≤ 20 V 1 10 mV ERROR AMPLIFIER VSENSE input regulation voltage TA = +25°C 5.85 6.00 6.15 V VSENSE input regulation voltage 5.82 6.00 6.18 V VSENSE input bias current In regulation 125 300 800 nA COMP high voltage, clamped VSENSE = 5.8 V 4.70 4.95 5.10 V COMP low voltage, saturated VSENSE = 6.2 V 0.03 0.125 V COMP = 3 V, gm VSENSE to COMP transconductance 75 96 110 µS 5.94 V < VSENSE < 6.06 V COMP source current, overdriven VSENSE = 5 V, COMP = 3 V –120 –160 –190 µA COMP sink current VSENSE = 6.4 V, COMP = 3 V 18 25 32 µA VSENSE threshold for COMP offset enable, down Voltage below VREF 135 185 235 mV from VREF VOVP VSENSE over-voltage threshold, rising 6.25 6.45 6.7 V VSENSE over-voltage hysteresis 0.1 0.2 0.4 V VSENSE enable threshold, rising 1.15 1.25 1.35 V VSENSE enable hysteresis 0.02 0.05 0.2 V OUTPUT MONITORING VPWMCNTL HVSEN threshold to PWMCNTL HVSEN rising 2.35 2.50 2.65 V HVSEN input bias current, high HVSEN = 3 V –0.5 0.5 µA HVSEN input bias current, low HVSEN = 2 V 28 36 41 µA HVSEN rising threshold to over-voltage fault 4.64 4.87 5.1 V HVSEN falling threshold to over-voltage fault 4.45 4.67 4.80 V PHB = 5 V, Phase Fail filter time to PWMCNTL high 8 14 20 ms ZCDA switching, ZCDB = 0.5 V PWMCNTL leakage current high HVSEN = 2 V, PWMCNTL = 15 V –1 1 µA PWMCNTL output voltage low HVSENS = 3 V, IPWMCNTL = 5 mA 0.2 0.5 V (1) Excessive VCC input voltage and current will damage the device. This clamp does not protect the device from an unregulated supply. If an unregulated supply is used, a Fixed Positive Voltage Regulator such as the UA78L15A is recommended. See the Absolute Maximum Ratings table for the limits on VCC voltage and current. 4 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): UCC28060 |
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