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580M-01LF Datasheet(PDF) 7 Page - Integrated Device Technology |
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580M-01LF Datasheet(HTML) 7 Page - Integrated Device Technology |
7 / 13 page ICS580-01 GLITCH-FREE CLOCK MULITPLEXER CLOCK MULTIPLEXER IDT™ / ICS™ GLITCH-FREE CLOCK MULITPLEXER 7 ICS580-01 REV L 051310 AC Electrical Characteristics Unless stated otherwise, VDD = 3.3V ±5%, Ambient Temperature -40 to +85 ° C Note 1. Frequencies less than the minimum may cause a timeout which will not guarantee glitch-free switching unless the clock is actually stopped. Note 2: Assumes identically loaded outputs with identical rise times, measured at VDD/2. Note 3: Output duty cycle is set by duty cycle of input clock at VDDC/2. Input Low Voltage VIL INA and INB only Note 3 (VDDC/2)-1 V Input Capacitance CIN 4pF Output High Voltage VOH IOH = -12 mA VDDC-0.5 V Output Low Voltage VOL IOL = 12 mA 0.5 V Short Circuit Current IOS ±70 mA On-chip pull-up Resistor RPU Non-clock inputs Pull-up to VDDC 250 k Ω Parameter Symbol Conditions Min. Typ. Max. Units Input Frequency INA and INB, Note 1 fIN VDDC = 5V 1/timeout 270 MHz VDDC = 3.3V 1/timeout 220 MHz VDDC = 2.7V 1/timeout 180 MHz Propagation Delay INA or INB to output VDDC = 5V 4 8 ns VDDC = 3.3V 5 10 ns VDDC = 2.7V 6 12 ns Transition Detector Timeout, DIV = 0 VDDI = 5V 175 350 750 ns VDDI = 3.3V 500 1000 2000 ns VDDI = 2.7V 750 1500 3000 ns Transition Detector Timeout, DIV = 1 VDDI = 5V 20 40 80 ns VDDI = 3.3V 55 110 210 ns VDDI = 2.7V 100 200 400 ns Output Clock Rise Time 1.5 ns Output Clock Fall Time 1.5 ns Output Clock Skew CLK1 to CLK2 Note 2 -250 0 250 ps Parameter Symbol Conditions Min. Typ. Max. Units |
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