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EL5825IR-T13 Datasheet(PDF) 2 Page - Intersil Corporation |
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EL5825IR-T13 Datasheet(HTML) 2 Page - Intersil Corporation |
2 / 12 page 2 FN7005.4 June 24, 2005 IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Absolute Maximum Ratings (TA = 25°C) Supply Voltage between VS and GND. . . . . . . . . . . . . . . . . . . .+18V Supply Voltage between VSD and GND . . . . . . . VS and +7V (max) Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 30mA Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . 125°C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Electrical Specifications VS = 15V, VSD = 5V, VREFH = 13V, VREFL = 2V, RL = 1.5kΩ and CL = 200pF to 0V, TA = 25°C, unless otherwise specified. PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT SUPPLY IS Supply Current No load 7.6 9 mA ISD Digital Supply Current 0.17 0.35 mA ANALOG VOL Output Swing Low Sinking 5mA (VREFH = 15V, VREFL = 0) 50 150 mV VOH Output Swing High Sourcing 5mA (VREFH = 15V, VREFL = 0) 14.85 14.95 V ISC Short Circuit Current RL = 10Ω 100 140 mA PSRR Power Supply Rejection Ratio VS+ is moved from 14V to 16V 45 60 dB tD Program to Out Delay 4ms VAC Accuracy 20 mV VDROOP Droop Voltage 12 mV/ms RINH Input Resistance @ VREFH, VREFL 34 k Ω REG Load Regulation IOUT = 5mA step 0.5 1.5 mV/mA BG Band Gap 1.1 1.3 1.6 V DIGITAL VIH Logic 1 Input Voltage VSD- 20% V VIL Logic 0 Input Voltage 20%* VSD V FCLK Clock Frequency 5MHz tS Setup Time 20 ns tH Hold Time 20 ns tLC Load to Clock Time 20 ns tCE Clock to Load Line 20 ns tDCO Clock to Out Delay Time Negative edge of SCLK 10 ns RSDIN SDIN Input Resistance 1G Ω EL5825 |
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