5

FN7005.4

June 24, 2005

FIGURE 7. SMALL SIGNAL RESPONSE (FALLING FROM 200mV TO 100mV)

FIGURE 8. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

FIGURE 9. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

FIGURE 10. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

FIGURE 11. PACKAGE POWER DISSIPATION vs AMBIENT

TEMPERATURE

SCLK

SDA

ENA

OUTA

M=200µs/div

1.4

0

AMBIENT TEMPERATURE (°C)

1.2

1

0.8

0.6

0.4

0.2

0

25

50

75

100

125

85

1.176W

θ

JA =

85

°C

/W

TS

SO

P2

4

JEDEC JESD51-7 HIGH EFFECTIVE THERMAL

CONDUCTIVITY TEST BOARD

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

0

255075

100

125

AMBIENT TEMPERATURE (°C)

85

781mW

θ

JA =

12

8°C/

W

TS

SO

P2

4

JEDEC JESD51-3 LOW EFFECTIVE THERMAL

CONDUCTIVITY TEST BOARD

JEDEC JESD51-7 HIGH EFFECTIVE THERMAL

CONDUCTIVITY TEST BOARD - QFN EXPOSED

DIEPAD SOLDERED TO PCB PER JESD51-5

3

2.5

2

1.5

1

0.5

0

0

255075

100

150

AMBIENT TEMPERATURE (°C)

2.703W

θ

JA =

37

°C

/W

Q

FN

24

125

85

JEDEC JESD51-3 AND SEMI G42-88 (SINGLE

LAYER) TEST BOARD

0.8

0.7

0.5

0.3

0.2

0.1

0

025

50

75

100

150

AMBIENT TEMPERATURE (°C)

714mW

125

85

0.6

0.4

EL5825