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AS4C256M8D2-25BCN Datasheet(PDF) 10 Page - Alliance Semiconductor Corporation |
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AS4C256M8D2-25BCN Datasheet(HTML) 10 Page - Alliance Semiconductor Corporation |
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10 / 70 page  *1 : A13 is reserved for future use and must be programmed to 0 when setting the mode register. BA2 and A14 are not used for 512Mb, b t used for 1Gb and 2Gb DDR2 SDRAMs. A15 is reserved for future use. Address Field RDQS Extended Mode Register DLL 0*1 D.I.C BA0 A15*1~A13 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 A0 DLL En able 0Enable 1 Disable Additive latency A5 A4 A3 Additive Latency 00 0 0 00 1 1 01 0 2 01 1 3 10 0 4 1 0 1 5 11 0 1 1 1 Reserved tting to default, OCD mode needs to be exited by setting A9-A7 to A9 A8 A7 OC 00 0 O 00 1 01 0 10 0 11 1 defau OCD program 1 DQS Rtt Rtt A1 Outpu t Dri ver Impe denc e Control Drive r Size 0Normal 100% 1Weak60% A10 DQS 0Enable 1Disable * If RDQS is enabled, the DM function is disabled. RDQS is active for reads and don’t care for writes. A11 RDQS Enable 0 Disable 1Enable BA1 0 A6 A2 Rtt (NOMINAL) 00 ODT 01 1 0 150 ohm 1 1 50 ohm (*2) BA1 BA0 MRS mode 00 MRS 01 EMRS(1) 1 0 EMRS(2) 1 1 EMRS(3): Reserved EMRS(1) Programming Qoff A12 A12 Qoff (Optional) a a. Outputs disabled - DQs, DQSs, DQSs, RDQS, RDQS. This feature is used in conjunction with dimm IDD meaurements when IDDQ is not desired to be included. 0 Output buffer enabled 1 Output buffer disabled A11 (RDQS Enable) A10 (DQS Enable) Strob e Fun cti on M atrix RDQS/DM RDQS DQS DQS 0 (Disable) 0 (Enable) DM Hi-z DQS DQS 0 (Disable) 1 (Disable) DM Hi-z DQS Hi-z 1 (Enable) 0 (Enable) RDQS RDQS DQS DQS 1 (Enable) 1 (Disable) RDQS Hi-z DQS Hi-z BA2*1 0 75 ohm Disable 2Gb DDR2 - AS4C256M8D2 Confidential -10/70- Rev.1.0 Sep. 2015 |
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