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GRM155R71H103J Datasheet(PDF) 5 Page - Integrated Device Technology

Part # GRM155R71H103J
Description  6 Bit Digital Step Attenuator
Download  22 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

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6 Bit Digital Step Attenuator
1 MHz to 4000 MHz
Glitch-FreeTM, Digital Step Attenuator
5
Rev 1, May 2017
IDTF1912NCGI
Datasheet
F1912 SPECIFICATION (CONTINUED)
Specifications apply at VDD = +3.3 V, TCASE = +25 °C, FRF = 2000 MHz, Pin = 0 dBm, Serial Mode (Vmode > VIH),
Zsource = ZLoad = 50 Ω unless otherwise noted. EvKit losses are de-embedded.
Parameter
Symbol
Conditions
Min
Typ
Max
Units
MSB Step Time
TLSB
Start LE rising edge > VIH
End ±0.10 dB Pout settling for
15.5 dB to 16.0 dB transition
500
ns
Maximum spurious level on
any RF port4
SpurMAX
-140
dBm
Maximum Switching
Frequency
SWFREQ
25
kHz
DSA Settling time
SET
Max to Min Attenuation to
settle to within 0.5 dB of final
value
0.9
s
Min to Max Attenuation to
settle to within 0.5 dB of final
value
1.8
Control Interface
SPIBIT
6
bit
Serial Clock Speed
SPICLK
25
MHz
Note 1: Items in min/max columns in
bold italics are Guaranteed by Test.
Note 2: Items in min/max columns that are not bold/italics are Guaranteed by Design Characterization.
Note 3: The input 0.1dB compression point is a linearity figure of merit. Refer to Absolute Maximum Ratings section for the maximum RF input
power.
Note 4: Spurious due to on-chip negative voltage generator. Typical generator fundamental frequency is 2.2 MHz.
Note 5: Speeds are measured after SPI programming is completed (data latched with LE = HIGH).


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