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AS4C32M16SM-7TCN Datasheet(PDF) 10 Page - Alliance Semiconductor Corporation

Part # AS4C32M16SM-7TCN
Description  PC133-compliant
Download  73 Pages
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Manufacturer  ALSC [Alliance Semiconductor Corporation]
Direct Link  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS4C32M16SM-7TCN Datasheet(HTML) 10 Page - Alliance Semiconductor Corporation

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AS4C32M16SM
Confidential
10 | P a g e
R e v 1 . 0 , J u l y 2014
Electrical Specifications
Stresses greater than those listed may cause permanent damage to the device. This is a stress rating only, and
functional operation of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect reliability.
Table 7: Absolute Maximum Ratings
Voltage/Temperature
Symbol
Min
Max
Unit
Notes
Voltage on VDD/VDDQ supply relative to VSS
V
DD
/V
DDQ
–1
+4.6
V
1
Voltage on inputs, NC, or I/O balls relative to VSS
V
IN
–1
+4.6
Storage temperature (plastic)
T
STG
–55
+155
°C
Power dissipation
1
W
Note: 1. VDD and VDDQ must be within 300mV of each other at all times. VDDQ must not exceed VDD.
Table 8: DC Electrical Characteristics and Operating Conditions
Notes 1–3 apply to all parameters and conditions; VDD/VDDQ = +3.3V ±0.3V
Parameter/Condition
Symbol
Min
Max
Unit
Notes
Supply voltage
V
DD
, V
DDQ
3
3.6
V
Input high voltage: Logic 1; All inputs
V
IH
2
VDD + 0.3
V
4
Input low voltage: Logic 0; All inputs
V
IL
–0.3
+0.8
V
4
Output high voltage: IOUT = –4mA
V
OH
2.4
V
Output low voltage: IOUT = 4mA
V
OL
0.4
V
Input leakage current:
IL
–5
5
μ A
Any input 0V ≤ VIN ≤ VDD (All other balls not under test = 0V)
Output leakage current: DQ are disabled; 0V ≤ VOUT ≤ VDDQ
I
OZ
–5
–5
μ A
Operating temperature:
Commercial
TA
0
+70
˚C
Industrial
TA
–40
+85
˚C
Notes:
1. All voltages referenced to VSS.
2. The minimum specifications are used only to indicate cycle time at which proper operation over the full
temperature range is ensured; (0°C ≤ TA ≤ +70°C (commercial), –40°C ≤ TA ≤ +85°C (industrial), and –40°C
≤ TA ≤ +105°C (automotive)).
3. An initial pause of 100μs is required after power-up, followed by two AUTO REFRESH commands, before
proper device operation is ensured. (VDD and VDDQ must be powered up simultaneously. VSS and VSSQ must
be at same potential.) The two AUTO REFRESH command wake-ups should be repeated any time the
tREF
refresh requirement is exceeded.
4.
VIH overshoot: VIH, max = VDDQ + 2V for a pulse width ≤ 3ns, and the pulse width cannot be greater than one-
third of the cycle rate. VIL undershoot: VIL, min = –2V for a pulse width ≤3ns.


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