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AS4C256M16D3LA-12BIN Datasheet(PDF) 8 Page - Alliance Semiconductor Corporation

Part # AS4C256M16D3LA-12BIN
Description  Fully synchronous operation
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Manufacturer  ALSC [Alliance Semiconductor Corporation]
Direct Link  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS4C256M16D3LA-12BIN Datasheet(HTML) 8 Page - Alliance Semiconductor Corporation

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Operation Mode Truth Table
Table 4. Truth Table (Note (1), (2))
Command
State CKEn-1
(3) CKEn DM BA0-2 A10/AP A0-9, 11, 13-14 A12/BC#
CS#
RAS#
CAS#
WE#
BankActivate
Idle(4)
H
H
X
V
Row address
L
L
H
H
Single Bank Precharge
Any
H
H
X
V
L
V
V
L
L
H
L
All Banks Precharge
Any
H
H
X
V
H
V
V
L
L
H
L
Write (Fixed BL8 or BC4)
Active(4)
H
H
X
V
L
V
V
L
H
L
L
Write (BC4, on the fly)
Active(4)
H
H
X
V
L
V
L
L
H
L
L
Write (BL8, on the fly)
Active(4)
H
H
X
V
L
V
H
L
H
L
L
Write with Autoprecharge
(Fixed BL8 or BC4)
Active(4)
H
H
X
V
H
V
V
L
H
L
L
Write with Autoprecharge
(BC4, on the fly)
Active(4)
H
H
X
V
H
V
L
L
H
L
L
Write with Autoprecharge
(BL8, on the fly)
Active(4)
H
H
X
V
H
V
H
L
H
L
L
Read (Fixed BL8 or BC4)
Active(4)
H
H
X
V
L
V
V
L
H
L
H
Read (BC4, on the fly)
Active(4)
H
H
X
V
L
V
L
L
H
L
H
Read (BL8, on the fly)
Active(4)
H
H
X
V
L
V
H
L
H
L
H
Read with Autoprecharge
(Fixed BL8 or BC4)
Active(4)
H
H
X
V
H
V
V
L
H
L
H
Read with Autoprecharge
(BC4, on the fly)
Active(4)
H
H
X
V
H
V
L
L
H
L
H
Read with Autoprecharge
(BL8, on the fly)
Active(4)
H
H
X
V
H
V
H
L
H
L
H
(Extended) Mode Register Set
Idle
H
H
X
V
OP code
L
L
L
L
No-Operation
Any
H
H
X
V
V
V
V
L
H
H
H
Device Deselect
Any
H
H
X
X
X
X
X
H
X
X
X
Refresh
Idle
H
H
X
V
V
V
V
L
L
L
H
SelfRefresh Entry
Idle
H
L
X
V
V
V
V
L
L
L
H
X
X
X
X
H
X
X
X
SelfRefresh Exit
Idle
L
H
X
V
V
V
V
L
H
H
H
X
X
X
X
H
X
X
X
Power Down Mode Entry
Idle
H
L
X
V
V
V
V
L
H
H
H
X
X
X
X
H
X
X
X
Power Down Mode Exit
Any
L
H
X
V
V
V
V
L
H
H
H
Data Input Mask Disable
Active
H
X
L
X
X
X
X
X
X
X
X
Data Input Mask Enable(5)
Active
H
X
H
X
X
X
X
X
X
X
X
ZQ Calibration Long
Idle
H
H
X
X
H
X
X
L
H
H
L
ZQ Calibration Short
Idle
H
H
X
X
L
X
X
L
H
H
L
NOTE 1: V=Valid data, X=Don't Care, L=Low level, H=High level
NOTE 2: CKEn signal is input level when commands are provided.
NOTE 3: CKEn-1 signal is input level one clock cycle before the commands are provided.
NOTE 4: These are states of bank designated by BA signal.
NOTE 5: LDM and UDM can be enabled respectively.
AS4C256M16D3LA-12BIN
Confidential
-8/83-
Rev. 1.0 May 2016


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