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843S1066DGLF Datasheet(PDF) 5 Page - Integrated Device Technology |
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843S1066DGLF Datasheet(HTML) 5 Page - Integrated Device Technology |
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5 / 15 page  5 ©2016 Integrated Device Technology, Inc. Revision B, November 10, 2016 843S1066D Datasheet Parameter Measurement Information 3.3V LVPECL Output Load AC Test Circuit RMS Period Jitter Output Duty Cycle/Pulse Width/Period Cycle-to-Cycle Jitter Output Rise/Fall Time VCC VCCA 2V -1.3V±0.165V 2V VOH VREF VOL Mean Period (First edge after trigger) Reference Point (Trigger Edge) 1 σ contains 68.26% of all measurements 2 σ contains 95.4% of all measurements 3 σ contains 99.73% of all measurements 4 σ contains 99.99366% of all measurements 6 σ contains (100-1.973x10-7)% of all measurements Histogram nQ Q tcycle n tcycle n+1 tjit(cc) = |tcycle n – tcycle n+1| 1000 Cycles nQ Q nQ Q |
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