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M34E02-F Datasheet(PDF) 8 Page - STMicroelectronics |
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M34E02-F Datasheet(HTML) 8 Page - STMicroelectronics |
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8 / 36 page  Signal description M34E02-F 8/36 DocID10367 Rev 14 2 Signal description 2.1 Serial Clock (SCL) This input signal is used to strobe all data in and out of the device. In applications where this signal is used by slave devices to synchronize the bus to a slower clock, the bus master must have an open drain output, and a pull-up resistor can be connected from Serial Clock (SCL) to VCC. (Figure 4 indicates how the value of the pull-up resistor can be calculated). In most applications, though, sthis method of synchronization is not employed, and so the pull- up resistor is not necessary, provided that the bus master has a push-pull (rather than open drain) output. 2.2 Serial Data (SDA) This bidirectional signal is used to transfer data in or out of the device. It is an open drain output that may be wire-OR’ed with other open drain or open collector signals on the bus. A pull up resistor must be connected from Serial Data (SDA) to VCC. (Figure 4 indicates how the value of the pull-up resistor can be calculated). 2.3 Chip Enable (E0, E1, E2) These input signals are used to set the value that is to be looked for on the three least significant bits (b3, b2, b1) of the 7-bit device select code. In the end application, E0, E1 and E2 must be directly (not through a pull-up or pull-down resistor) connected to VCC or VSS to establish the device select code. When these inputs are not connected, an internal pull- down circuitry makes (E0,E1,E2) = (0,0,0). The E0 input is used to detect the VHV voltage, when decoding an SWP or CWP instruction. Figure 3. Device select code Ai12301b VCC VSS Ei VCC M34E02-F VSS Ei M34E02-F |
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