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KS57C0502 Datasheet(PDF) 9 Page - Samsung semiconductor

Part # KS57C0502
Description  MICROCONTROLLER
Download  282 Pages
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

KS57C0502 Datasheet(HTML) 9 Page - Samsung semiconductor

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KS57C0502/C0504/P0504 MICROCONTROLLER
PRODUCT OVERVIEW
1–9
PIN DESCRIPTIONS
Table 1–2. KS57C0502/C0504 Pin Descriptions
Pin Name
Pin
Type
Description
Number
Share Pin
P0.0
P0.1
P0.2
I/O
3-bit I/O port. 1-bit or 3-bit read/write and test is
possible. Pull-up resistors are assignable to input
pins by software and are automatically disabled for
output pins. Pins are individually configurable as
input or output.
8(9)
9(10)
10(11)
SCK
SO
SI
P1.0
P1.1
I
2-bit input port. 1-bit or 2-bit read and test is possible.
Pull-up resistors are assignable by software.
5(5)
6(6)
INT0
INT1
P2.0–P2.3
I
4-bit input port. 1-bit or 4-bit read and test is possible.
11-14
(12-15)
CIN0–CIN3
P3.0
P3.1
P3.2
I/O
Same as port 0
15(16)
16(17)
17(18)
TCL0
TCLO0
CLO
P4.0–P4.3
P5.0–P5.3
I/O
4-bit I/O ports. 1-, 4-, or 8-bit read/write and test is
possible. Pins are individually configurable as input
or output. 4-bit pull-up resistors are software
assignable to input pins and are automatically
disabled for output pins. The N-channel open-drain or
push-pull output can be selected by software (1-bit
unit)
18-21(20-23)
22-25(24-27)
P6.0
P6.1
P6.2
P6.3
I/O
4-bit I/O port.
1-bit or 4-bit read/write and test is possible.
Pull-up resistors are assignable to input pins by
software and are automatically disabled for output
pins. Pins are individually configurable as input or
output.
26(28)
27(29)
28(30)
29(31)
KS0
KS1
KS2
BUZ
INT0
I
External interrupts with detection of rising and falling
edges
5(5)
P1.0
INT1
I
External interrupts with detection of rising or falling
edges
6(6)
P1.1
CIN0–CIN3
I
4-channel comparator input.
CIN0–CIN2: comparator input only.
CIN3: comparator input or external reference input
11-14(12-15)
P2.0–P2.3
SCK
I/O
Serial interface clock signal
8(9)
P0.0
SO
I/O
Serial data output
9(10)
P0.1
SI
I/O
Serial data input
10(11)
P0.2
TCL0
I/O
External clock input for timer/counter
15(16)
P3.0
TCLO0
I/O
Timer/counter clock output
16(17)
P3.1
CLO
I/O
CPU clock output
17(18)
P3.2
BUZ
I/O
2 kHz, 4 kHz, 8 kHz, or 16 kHz frequency output at
4.19 MHz for buzzer sound
29(31)
P6.3
NOTE: Pin numbers shown in parentheses '( )' are for 32-pin SOP package; other pin numbers are for the 30-pin SDIP.


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