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IDTCV141 Datasheet(PDF) 4 Page - Integrated Device Technology |
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IDTCV141 Datasheet(HTML) 4 Page - Integrated Device Technology |
4 / 10 page COMMERCIALTEMPERATURERANGE 4 IDTCV141 1-TO-8DIFFERENTIALCLOCKBUFFER BYTE 0 Bit Output(s) Affected Description/Function 0 1 Type Power On 7 PowerDown dirve mode Driven Tri-state RW 0 6 SRC_STOP# drive mode Driven Tri-state RW 0 5 Reserved RW 0 4 Reserved RW 0 3 Reserved RW 0 2 High_BW# Logically AND with HW pin High band width Low band width RW 1 1 PLL/Bypass# Logically AND with HW pin Bypass PLL mode RW 1 0 SRC_DIV2# Logically AND with HW pin Divided by 2 Normal RW 1 BYTE 2 Bit Output(s) Affected Description/Function 0 1 Type Power On 7 DIFF_7 Free Running with SRC_STOP# Free stopped RW 0 6 DIFF_6 Free Running with SRC_STOP# Free stopped RW 0 5 DIFF_5 Free Running with SRC_STOP# Free stopped RW 0 4 DIFF_4 Free Running with SRC_STOP# Free stopped RW 0 3 DIFF_3 Free Running with SRC_STOP# Free stopped RW 0 2 DIFF_2 Free Running with SRC_STOP# Free stopped RW 0 1 DIFF_1 Free Running with SRC_STOP# Free stopped RW 0 0 DIFF_0 Free Running with SRC_STOP# Free stopped RW 0 BYTE 1 Bit Output(s) Affected Description/Function 0 1 Type Power On 7 DIFF_7 OutputEnable Tristate Enable RW 1 6 DIFF_6 OutputEnable Tristate Enable RW 1 5 DIFF_5 OutputEnable Tristate Enable RW 1 4 DIFF_4 OutputEnable Tristate Enable RW 1 3 DIFF_3 OutputEnable Tristate Enable RW 1 2 DIFF_2 OutputEnable Tristate Enable RW 1 1 DIFF_1 OutputEnable Tristate Enable RW 1 0 DIFF_0 OutputEnable Tristate Enable RW 1 BYTE 3 Bit Output(s) Affected Description / Function 0 1 Type Power On 7 Reserved RW 6 Reserved RW 5 Reserved RW 4 Reserved RW 3 Reserved RW 2 Reserved RW 1 Reserved RW 0 Reserved RW CONTROLREGISTERS |
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