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MC100ES6254 Datasheet(PDF) 8 Page - Integrated Device Technology

Part # MC100ES6254
Description  2.5/3.3V Differential LVPECL 2x2 Clock Switch and Fanout Buffer
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

MC100ES6254 Datasheet(HTML) 8 Page - Integrated Device Technology

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MC100ES6254 REV. 7 JANUARY 7, 2013
8
©2013 Integrated Device Technology, Inc.
MC100ES6254 Data Sheet
2.5/3.3V DIFFERENTIAL LVPECL 2X2 CLOCK SWITCH AND FANOUT BUFFER
Maintaining Lowest Device Skew
The MC100ES6254 guarantees low output-to-output bank
skew of 50 ps and a part-to-part skew of maximum 250 ps. To
ensure low skew clock signals in the application, both outputs
of any differential output pair need to be terminated
identically, even if only one output is used. When fewer than
all nine output pairs are used, identical termination of all
output pairs within the output bank is recommended. If an
entire output bank is not used, it is recommended to leave all
of these outputs open and unterminated. This will reduce the
device power consumption while maintaining minimum
output skew.
Power Supply Bypassing
The MC100ES6254 is a mixed analog/digital product. The
differential architecture of the MC100ES6254 supports low
noise signal operation at high frequencies. In order to
maintain its superior signal quality, all VCC pins should be
bypassed by high-frequency ceramic capacitors connected
to GND. If the spectral frequencies of the internally generated
switching noise on the supply pins cross the series resonant
point of an individual bypass capacitor, its overall impedance
begins to look inductive and thus increases with increasing
frequency. The parallel capacitor combination shown ensures
that a low impedance path to ground exists for frequencies
well above the noise bandwidth.
Figure 5. VCC Power Supply Bypass
VCC
MC100ES6254
VCC
33...100 nF
0.1 nF


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